Cheng-Wen Wu

Professor

  • 4818 Citations
  • 36 h-Index
1985 …2019
If you made any changes in Pure these will be visible here soon.

Research Output 1985 2019

Filter
Paper
2004
38 Citations (Scopus)

An HMAC processor with integrated SHA-1 and MD5 algorithms

Wang, M. Y., Su, C. P., Huang, C. T. & Wu, C. W., 2004 Jun 1, p. 456-458. 3 p.

Research output: Contribution to conferencePaper

Hardware
Hash functions
Silicon
Communication
Costs
4 Citations (Scopus)

SRAM delay fault modeling and test algorithm development

Huang, R. F., Lai, Y. T., Chou, Y. F. & Wu, C. W., 2004 Jun 1, p. 104-109. 6 p.

Research output: Contribution to conferencePaper

Static random access storage
Networks (circuits)
Testing
2001

Optimizing sensitivity of a latched sense amplifier for CMOS SRAM using a simulation-based method

Chou, Y. F., Kwai, D. M. & Wu, C. W., 2001 Dec 1, p. 203-206. 4 p.

Research output: Contribution to conferencePaper

Static random access storage
Transistors
Electric potential
Electric power utilization
2000
38 Citations (Scopus)

Simulation-based test algorithm generation for random access memories

Wu, C. F., Huang, C. T., Cheng, K. L. & Wu, C. W., 2000 Jan 1, p. 291-296. 6 p.

Research output: Contribution to conferencePaper

Data storage equipment
Semiconductor materials
Testing
Industry
1997
3 Citations (Scopus)

Analysis and design of multiple-bit high-order Σ-Δ modulator

Hong, H. C., Lin, B. H. & Wu, C. W., 1997 Jan 1, p. 419-424. 6 p.

Research output: Contribution to conferencePaper

Modulators
Operational amplifiers
Deterioration
Capacitors
Bandwidth

Logic testing of switch-level faults for CMOS unate networks

Shieh, Y. R. & Wu, C. W., 1997 Dec 1, p. 212-215. 4 p.

Research output: Contribution to conferencePaper

Switches
Monitoring
Testing
Design for testability
Electric potential
1 Citation (Scopus)

Low-power testing for C-testable iterative logic arrays

Hwang, S. A. & Wu, C. W., 1997 Jan 1, p. 355-358. 4 p.

Research output: Contribution to conferencePaper

Electric power utilization
Polynomials
Testing
Costs

VLSI design of the RSA public-key cryptosystem

Lu, S. K. & Wu, C. W., 1997 Dec 1, p. 68-71. 4 p.

Research output: Contribution to conferencePaper

Cryptography
Clocks
Hardware
Costs
1996
3 Citations (Scopus)

FPGA-based hardware emulator for fast fault emulation

Hong, J. H., Hwang, S. A. & Wu, C. W., 1996 Dec 1, p. 345-348. 4 p.

Research output: Contribution to conferencePaper

Field programmable gate arrays (FPGA)
Hardware
Networks (circuits)
Sequential circuits
Simulators