Cheng-Wen Wu

Professor

  • 4818 Citations
  • 36 h-Index
1985 …2019
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Research Output 1985 2019

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Article
2019

Redio: Accelerating Disk-Based Graph Processing by Reducing Disk I/Os

Wu, C., Zhang, G., Wang, Y., Jiang, X. & Zheng, W., 2019 Mar 1, In : IEEE Transactions on Computers. 68, 3, p. 414-425 12 p., 8489961.

Research output: Contribution to journalArticle

Data storage equipment
Graph in graph theory
Processing
Scalability
Experiments
2017
2 Citations (Scopus)

A Built-Off Self-Repair Scheme for Channel-Based 3D Memories

Liu, H. H., Lin, B. Y., Wu, C. W., Chiang, W. T., Mincent, L., Lin, H. C., Peng, C. N. & Wang, M. J., 2017 Aug 1, In : IEEE Transactions on Computers. 66, 8, p. 1293-1301 9 p., 7850958.

Research output: Contribution to journalArticle

Repair
Data storage equipment
Dynamic random access storage
Redundancy
Die
11 Citations (Scopus)

Building a fault tolerant framework with deadline guarantee in big data stream computing environments

Sun, D., Zhang, G., Wu, C., Li, K. & Zheng, W., 2017 Nov, In : Journal of Computer and System Sciences. 89, p. 4-23 20 p.

Research output: Contribution to journalArticle

Deadline
Fault tolerance
Data Streams
Fault-tolerant
Computing
1 Citation (Scopus)

Controller architecture for low-power, low-latency DRAM with built-in cache

Liu, Z. Y., Shih, H. C., Lin, B. Y. & Wu, C. W., 2017 Apr 1, In : IEEE Design and Test. 34, 2, p. 69-78 10 p., 7397924.

Research output: Contribution to journalArticle

Dynamic random access storage
Controllers
Data storage equipment
3 Citations (Scopus)

Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package

Wang, K. L., Lin, B. Y., Wu, C. W., Lee, M., Chen, H., Lin, H. C., Peng, C. N. & Wang, M. J., 2017 Jun 1, In : IEEE Design and Test. 34, 3, p. 50-58 9 p., 7464303.

Research output: Contribution to journalArticle

Chip scale packages
Cost reduction
Packaging
Fans
Costs
2016
3 Citations (Scopus)

A local parallel search approach for memory failure pattern identification

Lin, B. Y., Wu, C. W., Lee, M., Lin, H. C., Peng, C. N. & Wang, M. J., 2016 Mar 1, In : IEEE Transactions on Computers. 65, 3, p. 770-780 11 p., 7173026.

Research output: Contribution to journalArticle

Data storage equipment
Logic circuits
Logic
Failure Analysis
Design Rules
1 Citation (Scopus)

Configurable Cubical Redundancy Schemes for Channel-Based 3-D DRAM Yield Improvement

Lin, B. Y., Chiang, W. T., Wu, C. W., Lee, M., Lin, H. C., Peng, C. N. & Wang, M. J., 2016 Apr 1, In : IEEE Design and Test. 33, 2, p. 30-39 10 p., 7154435.

Research output: Contribution to journalArticle

Dynamic random access storage
Redundancy
Data storage equipment
5 Citations (Scopus)

Rethinking computer architectures and software systems for phase-change memory

Wu, C., Zhang, G. & Li, K., 2016 May, In : ACM Journal on Emerging Technologies in Computing Systems. 12, 4, 33.

Research output: Contribution to journalArticle

Phase change memory
Computer architecture
Computer systems
Data storage equipment
Dynamic random access storage
2015
44 Citations (Scopus)

RRAM defect modeling and failure analysis based on march test and a novel squeeze-search scheme

Chen, C. Y., Shih, H. C., Wu, C. W., Lin, C. H., Chiu, P. F., Sheu, S. S. & Chen, F. T., 2015 Jan 1, In : IEEE Transactions on Computers. 64, 1, p. 180-190 11 p., 6725492.

Research output: Contribution to journalArticle

Failure Analysis
Random Access
Failure analysis
Defects
Data storage equipment
2014
5 Citations (Scopus)

Application-independent testing of 3-D field programmable gate array interconnect faults

Peng, Y. L., Kwai, D. M., Chou, Y. F. & Wu, C. W., 2014 Feb 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 2, p. 207-219 13 p., 6459051.

Research output: Contribution to journalArticle

Field programmable gate arrays (FPGA)
Testing
Silicon
Scalability
Switches
10 Citations (Scopus)

DArT: A component-based DRAM area, power, and timing modeling tool

Shih, H. C., Luo, P. W., Yeh, J. C., Lin, S. Y., Kwai, D. M., Lu, S. L., Schaefer, A. & Wu, C. W., 2014 Jan 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 33, 9, p. 1356-1369 14 p., 6879579.

Research output: Contribution to journalArticle

Dynamic random access storage
Circuit simulation
Bandwidth
5 Citations (Scopus)

Low-cost post-bond testing of 3-D ICs containing a passive silicon interposer base

Chi, C. C., Marinissen, E. J., Goel, S. K. & Wu, C. W., 2014 Nov 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 11, p. 2388-2401 14 p., 6680768.

Research output: Contribution to journalArticle

Silicon
Testing
Costs
Wire
Cost benefit analysis
3 Citations (Scopus)

On improving interconnect defect diagnosis resolution and yield for interposer-based 3-D ICs

Chi, C. C., Lin, B. Y., Wu, C. W., Wang, M. J., Lin, H. C. & Peng, C. N., 2014 Jan 1, In : IEEE Design and Test. 31, 4, p. 16-26 11 p., 6221038.

Research output: Contribution to journalArticle

Built-in self test
Defects
PROM
Flash memory
Clocks
2013
2 Citations (Scopus)

AC-plus scan methodology for small delay testing and characterization

Li, T. Y., Huang, S. Y., Hsu, H. J., Tzeng, C. W., Huang, C. T., Liou, J. J., Ma, H. P., Huang, P. C., Bor, J. C., Tien, C. C., Wang, C. H. & Wu, C. W., 2013 Jan 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 2, p. 329-341 13 p., 6166352.

Research output: Contribution to journalArticle

Defects
Testing
Flip flop circuits
Phase locked loops
Clocks
5 Citations (Scopus)

Generalization of an enhanced ECC methodology for low power PSRAM

Chen, P. Y., Su, C. L., Chen, C. H. & Wu, C. W., 2013 Jun 5, In : IEEE Transactions on Computers. 62, 7, p. 1318-1331 14 p., 6189334.

Research output: Contribution to journalArticle

Static random access storage
Error Control
Methodology
Data storage equipment
Parity
22 Citations (Scopus)

In-situ method for TSV delay testing and characterization using input sensitivity analysis

You, J. W., Huang, S. Y., Lin, Y. H., Tsai, M. H., Kwai, D. M., Chou, Y. F. & Wu, C. W., 2013 Jan 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 3, p. 443-453 11 p., 6166351.

Research output: Contribution to journalArticle

Sensitivity analysis
Silicon
Testing
Capacitance
Networks (circuits)
5 Citations (Scopus)

Low-cost error tolerance scheme for 3-D CMOS imagers

Chang, H. M. C., Huang, J. L., Kwai, D. M., Cheng, K. T. & Wu, C. W., 2013 Jan 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 3, p. 465-474 10 p., 6186837.

Research output: Contribution to journalArticle

Image sensors
Digital to analog conversion
Pixels
Costs
Silicon
6 Citations (Scopus)

Reactivation of spares for off-chip memory repair after die stacking in a 3-D IC with TSVs

Chou, Y. F., Kwai, D. M., Shieh, M. D. & Wu, C. W., 2013 Mar 11, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 60, 9, p. 2343-2351 9 p., 6470720.

Research output: Contribution to journalArticle

Repair
Data storage equipment
Electric fuses
Silicon
Dynamic random access storage
1 Citation (Scopus)

Write current self-configuration scheme for MRAM yield improvement

Chen, C. Y., Wang, S. H. & Wu, C. W., 2013 Jan 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 7, p. 1260-1270 11 p., 6255805.

Research output: Contribution to journalArticle

Data storage equipment
Networks (circuits)
Magnetic circuits
Durability
Specifications
2012
23 Citations (Scopus)

A study on electric properties for pulse laser annealing of ITO film after wet etching

Lee, C. J., Lin, H. K., Li, C. H., Chen, L. X., Lee, C. C., Wu, C. W. & Huang, J. C., 2012 Nov 1, In : Thin Solid Films. 522, p. 330-335 6 p.

Research output: Contribution to journalArticle

laser annealing
Wet etching
ITO (semiconductors)
Laser pulses
Electric properties
2011
8 Citations (Scopus)

A built-in self-diagnosis and repair design with fail pattern identification for memories

Su, C. L., Huang, R. F., Wu, C. W., Luo, K. L. & Wu, W. C., 2011 Dec 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 12, p. 2184-2194 11 p., 5593911.

Research output: Contribution to journalArticle

Repair
Data storage equipment
Redundancy
Semiconductor materials
26 Citations (Scopus)

A memory built-in self-repair scheme based on configurable spares

Lee, M., Denq, L. M. & Wu, C. W., 2011 Jun 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30, 6, p. 919-929 11 p., 5768135.

Research output: Contribution to journalArticle

Repair
Data storage equipment
Redundancy
Networks (circuits)
Metals
3 Citations (Scopus)

Speeding up emulation-based diagnosis techniques for logic cores

Lu, S. K., Chen, Y. M., Huang, S. Y. & Wu, C. W., 2011 Jul 1, In : IEEE Design and Test of Computers. 28, 4, p. 88-97 10 p., 5728786.

Research output: Contribution to journalArticle

Networks (circuits)
Failure analysis
Field programmable gate arrays (FPGA)
Hardware
18 Citations (Scopus)

Yield enhancement by bad-die recycling and stacking with though-silicon vias

Chou, Y. F., Kwai, D. M. & Wu, C. W., 2011 Aug 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 8, p. 1346-1356 11 p., 5497215.

Research output: Contribution to journalArticle

Recycling
Silicon
Switches
Thermal conductivity
Time delay
2010
6 Citations (Scopus)

A mesh-structured scalable IPsec processor

Wang, M. Y. & Wu, C. W., 2010 May 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18, 5, p. 725-731 7 p., 5169966.

Research output: Contribution to journalArticle

Internet
Network protocols
Gateways (computer networks)
Network security
Optical fibers
19 Citations (Scopus)

An efficient multimode multiplier supporting AES and fundamental operations of public-key cryptosystems

Wang, C. H., Chuang, C. L. & Wu, C. W., 2010 Apr 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18, 4, p. 553-563 11 p., 5288547.

Research output: Contribution to journalArticle

Cryptography
Throughput
Clocks
Polynomials
13 Citations (Scopus)

Built-in self-repair schemes for flash memories

Hsiao, Y. Y., Chen, C. H. & Wu, C. W., 2010 Aug 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29, 8, p. 1243-1256 14 p., 5512690.

Research output: Contribution to journalArticle

Flash memory
Repair
Redundancy
Data storage equipment
Built-in self test
3 Citations (Scopus)

Diagnosis of MRAM write disturbance fault

Su, C. L., Tsai, C. W., Chen, C. Y., Lo, W. Y., Wu, C. W., Chen, J. J., Wu, W. C., Hung, C. C. & Kao, M. J., 2010 Dec 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18, 12, p. 1762-1766 5 p., 5229479.

Research output: Contribution to journalArticle

Random access storage
Built-in self test
Networks (circuits)
Failure analysis
5 Citations (Scopus)

Economic analysis of the HOY wireless test methodology

Hsing, Y., Denq, L., Chen, C. H. & Wu, C. W., 2010 May 1, In : IEEE Design and Test of Computers. 27, 3, p. 20-30 11 p., 5255193.

Research output: Contribution to journalArticle

Economic analysis
Costs
Discrete Fourier transforms
46 Citations (Scopus)

Efficient BISR techniques for embedded memories considering cluster faults

Lu, S. K., Yang, C. L., Hsiao, Y. C. & Wu, C. W., 2010 Feb 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18, 2, p. 184-193 10 p., 4814490.

Research output: Contribution to journalArticle

Redundancy
Data storage equipment
Repair
51 Citations (Scopus)

Single- and multi-core configurable AES architectures for flexible security

Wang, M. Y., Su, C. P., Horng, C. L., Wu, C. W. & Huang, C. T., 2010 Apr 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18, 4, p. 541-552 12 p., 5169969.

Research output: Contribution to journalArticle

Cryptography
Throughput
Processing
Bandwidth
Logic gates
31 Citations (Scopus)

SOC test architecture and method for 3-D ICs

Lo, C. Y., Hsing, Y. T., Denq, L. M. & Wu, C. W., 2010 Oct 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29, 10, p. 1645-1649 5 p., 5580221.

Research output: Contribution to journalArticle

Integrated circuits
Access control
Integrated circuit testing
Design for testability
Control systems
2009
6 Citations (Scopus)

Hybrid BIST scheme for multiple heterogeneous embedded memories

Denq, L. M., Hsing, Y. T. & Wu, C. W., 2009 Jun 3, In : IEEE Design and Test of Computers. 26, 2, p. 64-73 10 p.

Research output: Contribution to journalArticle

Built-in self test
Data storage equipment
Computer systems
Defects
Networks (circuits)
2008
2 Citations (Scopus)

A systematic approach to memory test time reduction

Yeh, J. C., Kuo, S. F., Chen, C. H. & Wu, C. W., 2008 Dec 30, In : IEEE Design and Test of Computers. 25, 6, p. 560-570 11 p.

Research output: Contribution to journalArticle

Data storage equipment
1 Citation (Scopus)

Test algorithm and bist design for mram write disturbance fault

Chen, C. Y., Lo, W. Y., Su, C. L. & Wu, C. W., 2008 Apr 1, In : International Journal of Electrical Engineering. 15, 2, p. 63-70 8 p.

Research output: Contribution to journalArticle

Built-in self test
Networks (circuits)
Random access storage
Magnetic fields
13 Citations (Scopus)

Write disturbance modeling and testing for MRAM

Su, C. L., Tsai, C. W., Wu, C. W., Hung, C. C., Chen, Y. S., Wang, D. Y., Lee, Y. J. & Kao, M. J., 2008 Mar 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16, 3, p. 277-288 12 p., 4453958.

Research output: Contribution to journalArticle

Data storage equipment
Testing
Flash memory
Random access storage
Circuit simulation
2007
3 Citations (Scopus)

BIST-based diagnosis scheme for field programmable gate array interconnect delay faults

Peng, Y. L., Wu, C. W., Liou, J. J. & Huang, C. T., 2007 Nov 5, In : IET Computers and Digital Techniques. 1, 6, p. 716-723 8 p.

Research output: Contribution to journalArticle

Built-in self test
Field programmable gate arrays (FPGA)
Defects
Networks (circuits)
26 Citations (Scopus)

Economic aspects of memory built-in self-repair

Huang, R. F., Chen, C. H. & Wu, C. W., 2007 Mar 1, In : IEEE Design and Test of Computers. 24, 2, p. 164-172 9 p.

Research output: Contribution to journalArticle

Repair
Data storage equipment
Economics
Built-in self test
Cost effectiveness
30 Citations (Scopus)

Flash memory testing and built-in self-diagnosis with march-like test algorithms

Yeh, J. C., Cheng, K. L., Chou, Y. F. & Wu, C. W., 2007 Jun 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 26, 6, p. 1101-1113 13 p.

Research output: Contribution to journalArticle

Flash memory
Testing
Built-in self test
Failure analysis
Data storage equipment
24 Citations (Scopus)

Raisin: Redundancy analysis algorithm simulation

Huang, R. F., Li, J. F., Yeh, J. C. & Wu, C. W., 2007 Dec 1, In : IEEE Design and Test of Computers. 24, 4, p. 386-396 11 p.

Research output: Contribution to journalArticle

Redundancy
Repair
Data storage equipment
Flash memory
Networks (circuits)
11 Citations (Scopus)

STEAC: A platform for automatic SOC test integration

Lo, C. Y., Wang, C. H., Cheng, K. L., Huang, J. R., Wang, C. W., Wang, S. M. & Wu, C. W., 2007 May 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15, 5, p. 541-545 5 p.

Research output: Contribution to journalArticle

Scheduling
System-on-chip
Costs
Hardware
Defects
2006
123 Citations (Scopus)

Biological effect of far-infrared therapy on increasing skin microcirculation in rats

Yu, S. Y., Chiu, J. H., Yang, S. D., Hsu, Y. C., Lui, W. Y. & Wu, C. W., 2006 Apr 1, In : Photodermatology Photoimmunology and Photomedicine. 22, 2, p. 78-86 9 p.

Research output: Contribution to journalArticle

Microcirculation
Skin
Therapeutics
Nitric Oxide
Skin Temperature
81 Citations (Scopus)

Efficient built-in redundancy analysis for embedded memories with 2-D redundancy

Lu, S. K., Tsai, Y. C., Hsu, C. H., Wang, K. H. & Wu, C. W., 2006 Jan 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 14, 1, p. 34-42 9 p.

Research output: Contribution to journalArticle

Redundancy
Repair
Data storage equipment
Static random access storage
Computational complexity
2005
62 Citations (Scopus)

A built-in self-repair design for RAMs with 2-D redundancy

Li, J. F., Yeh, J. C., Huang, R. F. & Wu, C. W., 2005 Jun 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 6, p. 742-745 4 p.

Research output: Contribution to journalArticle

Random access storage
Redundancy
Repair
Data storage equipment
Built-in self test
74 Citations (Scopus)

Preconditioned hyperbaric oxygenation protects the liver against ischemia-reperfusion injury in rats

Yu, S. Y., Chiu, J. H., Yang, S. D., Yu, H. Y., Hsieh, C. C., Chen, P. J., Lui, W. Y. & Wu, C. W., 2005 Sep 1, In : Journal of Surgical Research. 128, 1, p. 28-36 9 p.

Research output: Contribution to journalArticle

Hyperbaric Oxygenation
Reperfusion Injury
Oxygen
Liver
HSP70 Heat-Shock Proteins
2004
22 Citations (Scopus)

A Graph-Based Approach to Power-Constrained SOC Test Scheduling

Su, C. P. & Wu, C. W., 2004 Feb 1, In : Journal of Electronic Testing: Theory and Applications (JETTA). 20, 1, p. 45-60 16 p.

Research output: Contribution to journalArticle

Scheduling
Cable cores
Tabu search
Heuristic algorithms
Wire

Efficient and Economical Test Equipment Setup Using Procorrelation

Lin, B. H., Wu, C. W. & Luh, H. T. A., 2004 Jan 1, In : IEEE Design and Test of Computers. 21, 1, p. 34-43 10 p.

Research output: Contribution to journalArticle

Recovery
Costs
2 Citations (Scopus)
Built-in self test
Modulators
Modulation
Networks (circuits)
Design for testability
2003
70 Citations (Scopus)

A High-Throughput Low-Cost AES Processor

Su, C. P., Lin, T. F., Huang, C. T. & Wu, C. W., 2003 Dec 1, In : IEEE Communications Magazine. 41, 12, p. 86-91 6 p.

Research output: Contribution to journalArticle

Throughput
Hardware
Costs
Table lookup
Computer hardware
5 Citations (Scopus)

Asymmetric high-radix signed-digit number systems for carry-free addition

Shieh, S. H. & Wu, C. W., 2003 Nov 1, In : Journal of Information Science and Engineering. 19, 6, p. 1015-1039 25 p.

Research output: Contribution to journalArticle

Numbering systems
Adders
Reusability
Hardware
hardware