Cheng-Wen Wu

Professor

  • 4818 Citations
  • 36 h-Index
1985 …2019
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Research Output 1985 2019

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Conference article
2013
6 Citations (Scopus)

Exploration methodology for 3D memory redundancy architectures under redundancy constraints

Lin, B. Y., Lee, M. & Wu, C. W., 2013 Jan 1, In : Proceedings of the Asian Test Symposium. p. 1-6 6 p., 6690605.

Research output: Contribution to journalConference article

Redundancy
Data storage equipment
Repair
Memory architecture
2011
39 Citations (Scopus)

Post-bond testing of 2.5D-SICs and 3D-SICs containing a passive silicon interposer base

Chi, C. C., Marinissen, E. J., Goel, S. K. & Wu, C. W., 2011 Dec 1, In : Proceedings - International Test Conference. 6139181.

Research output: Contribution to journalConference article

Silicon
Testing
Die
Interconnect
Latency
2005
48 Citations (Scopus)

An integrated ECC and redundancy repair scheme for memory reliability enhancement

Su, C. L., Yeh, Y. T. & Wu, C. W., 2005 Dec 12, In : Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. p. 81-89 9 p.

Research output: Contribution to journalConference article

Redundancy
Repair
Data storage equipment
Semiconductor materials
2004
7 Citations (Scopus)

An SOC test integration platform and its industrial realization

Cheng, K. L., Huang, J. R., Wang, C. W., Lo, C. Y., Denq, L. M., Huang, C. T., Wu, C. W., Hung, S. W. & Lee, J. Y., 2004 Dec 1, In : Proceedings - International Test Conference. p. 1213-1222 10 p.

Research output: Contribution to journalConference article

Scheduling
Costs
System-on-chip
Testing
Chip
1 Citation (Scopus)

A parallel built-in diagnostic scheme for multiple embedded memories

Denq, L. M., Huang, R. F., Wu, C. W., Chang, Y. J. & Wu, W. C., 2004 Dec 17, In : Records of the IEEE International Workshop on Memory Technology, Design and Testing. p. 65-69 5 p.

Research output: Contribution to journalConference article

Data storage equipment
Built-in self test
Computer systems
Hardware
Geometry
2 Citations (Scopus)

A Σ-Δ modulation based analog BIST system with a wide bandwidth fifth-order analog response extractor for diagnosis purpose

Hong, H. C., Wu, C. W. & Cheng, K. T., 2004 Dec 1, In : Proceedings of the Asian Test Symposium. p. 62-67 6 p.

Research output: Contribution to journalConference article

Built-in self test
Design for testability
Modulation
Bandwidth
Networks (circuits)
4 Citations (Scopus)

Fail pattern identification for memory built-in self-repair

Huang, R. F., Su, C. L., Wu, C. W., Lin, S. T., Luo, K. L. & Chang, Y. J., 2004 Dec 1, In : Proceedings of the Asian Test Symposium. p. 366-371 6 p.

Research output: Contribution to journalConference article

Repair
Data storage equipment
System-on-chip
18 Citations (Scopus)

MRAM defect analysis and fault modeling

Su, C. L., Huang, R. F., Wu, C. W., Hung, C. C., Kao, M. J., Chang, Y. J. & Wu, W. C., 2004 Dec 1, In : Proceedings - International Test Conference. p. 124-133 10 p.

Research output: Contribution to journalConference article

Random Access
Fault
Defects
Data storage equipment
Modeling
4 Citations (Scopus)

On test and diagnostics of flash memories

Huang, C. T., Yeh, J. C., Shih, Y. Y., Huang, R. F. & Wu, C. W., 2004 Dec 1, In : Proceedings of the Asian Test Symposium. p. 260-265 6 p.

Research output: Contribution to journalConference article

Flash memory
Design for testability
Built-in self test
Failure analysis
Field programmable gate arrays (FPGA)
2003
58 Citations (Scopus)

A Built-in Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy

Li, J. F., Yeh, J. C., Huang, R. F., Wu, C. W., Tsai, P. Y., Hsu, A. & Chow, E., 2003 Nov 6, In : IEEE International Test Conference (TC). p. 393-402 10 p.

Research output: Contribution to journalConference article

Repair
Redundancy
Semiconductors
Semiconductor materials
Data storage equipment
5 Citations (Scopus)

Combinational circuit fault diagnosis using logic emulation

Lu, S. K., Chen, J. L., Wu, C. W., Chang, W. F. & Huang, S. Y., 2003 Jul 14, In : Proceedings - IEEE International Symposium on Circuits and Systems. 5, p. V549-V552

Research output: Contribution to journalConference article

Combinatorial circuits
Failure analysis
Hardware
Networks (circuits)
Program processors
10 Citations (Scopus)

Fame: A Fault-Pattern Based Memory Failure Analysis Framework

Cheng, K. L., Wang, C. W., Lee, J. N., Chou, Y. F., Huang, C. T. & Wu, C. W., 2003 Dec 26, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 595-598 4 p.

Research output: Contribution to journalConference article

Failure analysis
Data storage equipment
Defects
Product development
Computer systems
21 Citations (Scopus)

Fault Pattern Oriented Defect Diagnosis for Memories

Wang, C. W., Cheng, K. L., Lee, J. N., Chou, Y. F., Huang, C. T., Wu, C. W., Huang, F. & Yang, H-T., 2003 Nov 6, In : IEEE International Test Conference (TC). p. 29-38 10 p.

Research output: Contribution to journalConference article

Failure Analysis
Failure analysis
Fault
Defects
Data storage equipment
2002
9 Citations (Scopus)

A hierarchical test scheme for system-on-chip designs

Li, J. F., Huang, H. J., Chen, J. B., Su, C. P., Wu, C. W., Cheng, C., Chen, S. I., Hwang, C. Y. & Lin, H. P., 2002 Dec 1, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 486-490 5 p., 998317.

Research output: Contribution to journalConference article

Built-in self test
Managers
Design for testability
Data storage equipment
Networks (circuits)
21 Citations (Scopus)

Diagonal test and diagnostic schemes for flash memories

Chiu, S. K., Yeh, J. C., Huang, C. T. & Wu, C. W., 2002 Jan 1, In : IEEE International Test Conference (TC). p. 37-46 10 p.

Research output: Contribution to journalConference article

Flash Memory
Flash memory
Diagnostics
Fault
Random access storage
2001
16 Citations (Scopus)

A built-in self-test and self-diagnosis scheme for heterogeneous SRAM clusters

Wang, C. W., Tzeng, R. S., Wu, C. F., Huang, C. T., Wu, C. W., Huang, S. Y., Lin, S. H. & Wang, H. P., 2001 Dec 1, In : Proceedings of the Asian Test Symposium. p. 103-108 6 p.

Research output: Contribution to journalConference article

Built-in self test
Static random access storage
Testing
Computer hardware
Clocks
19 Citations (Scopus)

Automatic generation of memory built-in self-test cores for system-on-chip

Cheng, K. L., Hsueh, C. M., Huang, J. R., Yeh, J. C., Huang, C. T. & Wu, C. W., 2001 Dec 1, In : Proceedings of the Asian Test Symposium. p. 91-96 6 p.

Research output: Contribution to journalConference article

Built-in self test
Data storage equipment
Testing
Memory architecture
Electric power utilization
50 Citations (Scopus)

March-based RAM diagnosis algorithms for stuck-at and coupling faults

Li, J. F., Cheng, K. L., Huang, C. T. & Wu, C. W., 2001 Dec 1, In : IEEE International Test Conference (TC). p. 758-767 10 p.

Research output: Contribution to journalConference article

Random access storage
Fault
Data storage equipment
Idempotent
Semiconductors
27 Citations (Scopus)

Memory fault diagnosis by syndrome compression

Li, J. F. & Wu, C. W., 2001 Dec 1, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 97-101 5 p., 915007.

Research output: Contribution to journalConference article

Failure analysis
Associative storage
Data storage equipment
Static random access storage
Data compression
2000
35 Citations (Scopus)

Built-in self-test and self-diagnosis scheme for embedded SRAM

Wang, C. W., Wu, C. F., Li, J. F., Wu, C. W., Teng, T., Chiu, K. & Lin, H. P., 2000 Dec 1, In : Proceedings of the Asian Test Symposium. p. 45-50 6 p.

Research output: Contribution to journalConference article

Built-in self test
Static random access storage
Data storage equipment
Failure analysis
Hardware
23 Citations (Scopus)

Cost and benefit models for logic and memory BIST

Lu, J. M. & Wu, C. W., 2000 Dec 1, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 710-714 5 p., 840865.

Research output: Contribution to journalConference article

Built-in self test
Data storage equipment
Costs
Economic and social effects
1 Citation (Scopus)

Hierarchical system test by an IEEE 1149.5 MTM-bus slave-module interface core

Hong, J. H., Tsai, C. H. & Wu, C. W., 2000 Oct 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 8, 5, p. 503-516 14 p.

Research output: Contribution to journalConference article

Hierarchical systems
System buses
Field programmable gate arrays (FPGA)
Networks (circuits)
1999
9 Citations (Scopus)

Fault detection and location of dynamic reconfigurable FPGAs

Wu, C. F. & Wu, C. W., 1999 Jan 1, In : International Symposium on VLSI Technology, Systems, and Applications, Proceedings. p. 215-218 4 p.

Research output: Contribution to journalConference article

fault detection
Electric fault location
Fault detection
Field programmable gate arrays (FPGA)
dynamic tests
72 Citations (Scopus)

RAMSES: A fast memory fault simulator

Wu, C. F., Huang, C. T. & Wu, C. W., 1999 Dec 1, In : IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems. p. 165-173 9 p.

Research output: Contribution to journalConference article

Screening
Simulators
Data storage equipment
2 Citations (Scopus)

Testable and fault tolerant design for FFT networks

Li, J. F. & Wu, C. W., 1999 Dec 1, In : IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems. p. 201-209 9 p.

Research output: Contribution to journalConference article

Fast Fourier transforms
Hardware
1998
3 Citations (Scopus)

On-line error detection schemes for a systolic finite-field inverter

Chuang, Y. C. & Wu, C. W., 1998 Dec 1, In : Proceedings of the Asian Test Symposium. p. 301-305 5 p.

Research output: Contribution to journalConference article

Error detection
Numbering systems
Cryptography

Probabilistic model for path delay faults

Wu, C. W. & Su, C. Y., 1998 Dec 1, In : Proceedings of the Asian Test Symposium. p. 70-75 6 p.

Research output: Contribution to journalConference article

Networks (circuits)
VLSI circuits
Testing
Probability density function
Analytical models
1997
16 Citations (Scopus)

High-speed C-testable systolic array design for Galois-Field inversion

Huang, C. T. & Wu, C. W., 1997 Jan 1, In : Proceedings of European Design and Test Conference. p. 342-346 5 p.

Research output: Contribution to journalConference article

Systolic arrays
Networks (circuits)
1 Citation (Scopus)

On energy efficiency of VLSI testing

Wu, C. W., 1997 Dec 1, In : Proceedings of the Asian Test Symposium. p. 132-137 6 p.

Research output: Contribution to journalConference article

Energy efficiency
Testing
Energy dissipation
Electric power utilization
1996
11 Citations (Scopus)

Efficient multifrequency analysis of fault diagnosis in analog circuits based on large change sensitivity computation

Lin, B. H., Shieh, S. H. & Wu, C. W., 1996 Dec 1, In : Proceedings of the Asian Test Symposium. p. 232-237 6 p.

Research output: Contribution to journalConference article

Analog circuits
Failure analysis
Compaction
Data storage equipment
1 Citation (Scopus)

MISR computation algorithm for fast signature simulation

Lin, B. H., Shieh, S. H. & Wu, C. W., 1996 Dec 1, In : Proceedings of the Asian Test Symposium. p. 213-218 6 p.

Research output: Contribution to journalConference article

Compaction
Data storage equipment
30 Citations (Scopus)

Systolic RSA public key cryptosystem

Chen, P. S., Hwang, S. A. & Wu, C. W., 1996 Jan 1, In : Proceedings - IEEE International Symposium on Circuits and Systems. 4, p. 408-411 4 p.

Research output: Contribution to journalConference article

Cryptography
Systolic arrays
Clocks
1995
4 Citations (Scopus)

DC control and observation structures for analog circuits

Shieh, Y. R. & Wu, C. W., 1995 Dec 1, In : Proceedings of the Asian Test Symposium. p. 120-126 7 p.

Research output: Contribution to journalConference article

Analog circuits
Observability
Networks (circuits)
Digital circuits
Electric potential
5 Citations (Scopus)

Low-cost realization of multiple-input exclusive-OR gates

Lin, K. J. & Wu, C. W., 1995 Dec 1, In : Proceedings of the Annual IEEE International ASIC Conference and Exhibit. p. 307-310 4 p.

Research output: Contribution to journalConference article

Networks (circuits)
Costs
Transistors
1994
5 Citations (Scopus)

General modular multiplication by block multiplication and table lookup

Wu, C. W. & Chou, Y. F., 1994 Dec 1, In : Proceedings - IEEE International Symposium on Circuits and Systems. 4, p. 295-298 4 p.

Research output: Contribution to journalConference article

Table lookup
Adders
Hardware
1990
3 Citations (Scopus)

Block pipeline 2-D IIR filter structures via iteration and retiming

Wu, C. W., 1990 Dec 1, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 731-734 4 p.

Research output: Contribution to journalConference article

Systolic arrays
IIR filters
Transfer functions
Pipelines
Throughput
1987
4 Citations (Scopus)

COMPUTER-AIDED DESIGN OF VLSI SECOND-ORDER SECTIONS.

Wu, C. W. & Cappello, P. R., 1987 Jan 1, In : ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings. p. 1907-1910 4 p.

Research output: Contribution to journalConference article

very large scale integration
computer aided design
Computer aided design
IIR filters
Computer operating systems