Projects per year
Personal profile
Education
- 1993 PhD, University of Washington, Seattle, U.S.A.
Research Interests
- Computer architecture
- Data network
- Fault-tolerant computing system
- Microprocessor system design
- Multiprocessor systems
- SoC system integration
- 容錯處理系統
Experience
- 1986~1987 Engineer, Philips Electronics, Inc. Taiwan
- 1989~1993 Research assistant, Department of Electrical Engineering, University of Washington
- 1993~1997 Associate professor, Department of Electronic Engineering, National Yunlin Institute of Technology
- 1997~1999 Associate professor, Department of Electronic Engineering, National Yunlin University of Science and Technology
- 1999~2006 Associate professor, Department of Electrical Engineering, National Cheng Kung University
- 2006~ present Professor, Department of Electrical Engineering, National Cheng Kung University
- 2011~2012 IEEE Circuit and System Society Tainan Chapter Chair
- 2012~ present 國際電機電子工程師學會中華民國第一分會常務理事
- 2014~ present Director, Institute of Computer and Communication Engineering, National Cheng Kung University
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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Collaborations and top research areas from the last five years
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Projects
- 32 Finished
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A Two-Phase Multi-Class Botnet Labeling Approach for Real-World Traffic
Lo, T. C., Yang, S. H., Chang, J. B., Chen, C. H. & Shieh, C. K., 2024, 6th International Conference on Artificial Intelligence in Information and Communication, ICAIIC 2024. Institute of Electrical and Electronics Engineers Inc., p. 685-690 6 p. (6th International Conference on Artificial Intelligence in Information and Communication, ICAIIC 2024).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
Optimization of stride prefetching mechanism and dependent warp scheduling on GPGPU
Tsou, T. H., Chen, D. J., Hung, S. Y., Wang, Y. H. & Chen, C. H., 2020, 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 9180866. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2020-October).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
Development of an Open ISA GPGPU for Edge Device Machine Learning Applications
Su, Y. X., Jheng, J. H., Chen, D. J. & Chen, C. H., 2019 Jul, ICUFN 2019 - 11th International Conference on Ubiquitous and Future Networks. IEEE Computer Society, p. 214-217 4 p. 8806196. (International Conference on Ubiquitous and Future Networks, ICUFN; vol. 2019-July).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Micro Darknet for Inference: ESL reference for inference accelerator design
Ji, M. Z., Tseng, W. C., Wu, T. J., Lin, B. R. & Chen, C. H., 2019 Oct, Proceedings - 2019 International SoC Design Conference, ISOCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 69-70 2 p. 9027644. (Proceedings - 2019 International SoC Design Conference, ISOCC 2019).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
Enabling SIMT execution model on homogeneous multi-Core system
Chen, K. C. & Chen, C. H., 2018 Mar, In: ACM Transactions on Architecture and Code Optimization. 15, 1, a6.Research output: Contribution to journal › Article › peer-review
Open Access5 Citations (Scopus)