Projects per year
Personal profile
Education
- 2001 PhD, Institute of Computer Science, National Chiao Tung University
Research Interests
- Embedded Systems
- Memory and Storage Systems
- Multicore Systems
- Operating Systems
Experience
- 2007/02~2011/07 Assistant Professor, Department of Computer and Information Science, National Cheng Kung University
- 2011/08~2015/07 Associate Professor, Department of Computer and Information Science, National Cheng Kung University
- 2015/08~present Professor, Department of Computer and Information Science, National Cheng Kung University
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Projects
Research output
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Global Clean Page First Replacement and Index-Aware Multistream Prefetcher in Hybrid Memory Architecture
Lin, I. C., Chang, D. W., Chen, W. J., Ke, J. T. & Huang, P. H., 2020 Sep, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39, 9, p. 1750-1763 14 p., 8756031.Research output: Contribution to journal › Article › peer-review
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A page cache management scheme in cloud computing environments
Chang, H. P., Liao, C. N. & Chang, D. W., 2019 Aug, Proceedings - IEEE 17th International Conference on Dependable, Autonomic and Secure Computing, IEEE 17th International Conference on Pervasive Intelligence and Computing, IEEE 5th International Conference on Cloud and Big Data Computing, 4th Cyber Science and Technology Congress, DASC-PiCom-CBDCom-CyberSciTech 2019. Institute of Electrical and Electronics Engineers Inc., p. 974-979 6 p. 8890374. (Proceedings - IEEE 17th International Conference on Dependable, Autonomic and Secure Computing, IEEE 17th International Conference on Pervasive Intelligence and Computing, IEEE 5th International Conference on Cloud and Big Data Computing, 4th Cyber Science and Technology Congress, DASC-PiCom-CBDCom-CyberSciTech 2019).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Infection-based dead page prediction in hybrid memory architecture
Lin, I. C., Chang, D. W., Kao, C. T. & Lin, S. X., 2019 Oct, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 27, 10, p. 2401-2412 12 p., 8760526.Research output: Contribution to journal › Article › peer-review
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SSKIP: Lifetime aware page skipping for multi-level cell flash-based solid-state drives
Li, J. G., Chen, G. Y., Chang, H. P. & Chang, D. W., 2019 May 3, ICEIC 2019 - International Conference on Electronics, Information, and Communication. Institute of Electrical and Electronics Engineers Inc., 8706493. (ICEIC 2019 - International Conference on Electronics, Information, and Communication).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration
Luo, J. Y., Cheng, H. Y., Lin, I. C. & Chang, D. W., 2019 Dec 1, In: IEEE Transactions on Computers. 68, 12, p. 1704-1719 16 p., 8716297.Research output: Contribution to journal › Article › peer-review
2 Citations (Scopus)