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Personal profile

Education

  • 2011 PhD, University of California, Berkeley, USA

Research Interests

  • Compact Device Modeling for NCFET
  • Compact Device Modeling for the FinFET and UTBSOI MOSFETs
  • Hardware Realization of AI Deep Learning
  • Nanofabrication of M-I-M Devices for Resistive Memory Applications
  • Numerical Simulation of Semiconductor Processes and Devices FinFET (TCAD)

Experience

  • 2008/7~2008/9 Engineering Intern, IBM Semiconductor Research and Development Center, New York, USA
  • 2010/1~2010/5 Research Intern, IBM Thomas J. Watson Research Lab, New York, USA
  • 2011/8~2015/8 Research Scientist, IBM Thomas J. Watson Research Lab, New York, USA
  • 2015/8~present Assistant Professor, Department of Electrical Engineering, National Cheng Kung University

Fingerprint Dive into the research topics where Darsen Lu is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

  • 2 Similar Profiles
Transistors Engineering & Materials Science
Field effect transistors Engineering & Materials Science
Surface potential Engineering & Materials Science
Circuit simulation Engineering & Materials Science
field effect transistors Physics & Astronomy
Static random access storage Engineering & Materials Science
Capacitance Engineering & Materials Science
Doping (additives) Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Projects 2016 2019

Research Output 2006 2019

Impact of Semiconductor Permittivity Reduction on Electrical Characteristics of Nanoscale MOSFETs

Chen, S. H., Lian, S. W., Wu, T. R., Chang, T-R., Liou, J. M., Lu, D., Kao, K-H., Chen, N. Y., Lee, W. J. & Tsai, J. H., 2019 Jun 1, In : IEEE Transactions on Electron Devices. 66, 6, p. 2509-2512 4 p., 8704283.

Research output: Contribution to journalArticle

Permittivity
Semiconductor materials
Poisson equation
Threshold voltage
Screening
1 Citation (Scopus)

An FET with a Source Tunneling Barrier Showing Suppressed Short-Channel Effects for Low-Power Applications

Hsieh, Y. F., Chen, S. H., Chen, N. Y., Lee, W. J., Tsai, J. H., Chen, C. N., Chiang, M-H., Lu, D. & Kao, K-H., 2018 Mar 1, In : IEEE Transactions on Electron Devices. 65, 3, p. 855-859 5 p.

Research output: Contribution to journalArticle

Field effect transistors
Threshold voltage

Emerging NVM circuit techniques and implementations for energy-efficient systems

Khwa, W. S., Lu, D., Dou, C. M. & Chang, M. F., 2018 Jan 1, Beyond-CMOS Technologies for Next Generation Computer Design. Springer International Publishing, p. 85-132 48 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

Computer systems
Data storage equipment
Networks (circuits)
Phase change memory
Static random access storage
13 Citations (Scopus)

FinFET with encased air-gap spacers for high-performance and low-energy circuits

Sachid, A. B., Huang, Y. M., Chen, Y. J., Chen, C. C., Lu, D., Chen, M. C. & Hu, C., 2017 Jan 1, In : IEEE Electron Device Letters. 38, 1, p. 16-19 4 p., 7744575.

Research output: Contribution to journalArticle

Silicon nitride
Networks (circuits)
Air
Carbon
Tensile stress

NVMLearn: A simulation platform for non-volatile-memory-based deep learning hardware

Lu, D., Liang, F. X., Wang, Y. C. & Zeng, H. K., 2017 Jul 21, Proceedings of the 2017 IEEE International Conference on Applied System Innovation: Applied System Innovation for Modern Technology, ICASI 2017. Meen, T-H., Lam, A. D. K-T. & Prior, S. D. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 66-69 4 p. 7988347. (Proceedings of the 2017 IEEE International Conference on Applied System Innovation: Applied System Innovation for Modern Technology, ICASI 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer hardware
learning
hardware
platforms
Learning

Thesis

金屬-絕緣層-金屬 二極體之特性研究

Author: 逸軒, 陳., 2016 Aug 12

Supervisor: Lu, D. (Supervisor)

Student thesis: Master's Thesis