Ing-Chao Lin

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Ing-Chao Lin

Professor

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20052022

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  • 2022

    An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine

    Chen, Y. G., Wang, C. H. & Lin, I. C., 2022, Proceedings - International SoC Design Conference 2022, ISOCC 2022. Institute of Electrical and Electronics Engineers Inc., p. 161-162 2 p. (Proceedings - International SoC Design Conference 2022, ISOCC 2022).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • GraphRC: Accelerating graph processing on dual-addressing memory with vertex merging

    Cheng, W., Wu, C. F., Chang, Y. H. & Lin, I. C., 2022 Oct 30, Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022. Institute of Electrical and Electronics Engineers Inc., 21. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • WRAP: Weight RemApping and Processing in RRAM-based Neural Network Accelerators Considering Thermal Effect

    Chen, P. Y., Gu, F. Y., Huang, Y. H. & Lin, I. C., 2022, Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022. Bolchini, C., Verbauwhede, I. & Vatajelu, I. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 1245-1250 6 p. (Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    2 Citations (Scopus)
  • 2021

    A novel nbti-aware chip remaining lifetime prediction framework using machine learning

    Chen, Y. G., Lin, I. C. & Wei, Y. C., 2021 Apr 7, Proceedings of the 22nd International Symposium on Quality Electronic Design, ISQED 2021. IEEE Computer Society, p. 476-481 6 p. 9424356. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2021-April).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    2 Citations (Scopus)
  • 2020

    An NBTI-Aware Task Parallelism Scheme for Improving Lifespan of Multi-core Systems

    Chen, Y. G., Lin, Y. Y. & Lin, I. C., 2020 Mar, Proceedings of the 21st International Symposium on Quality Electronic Design, ISQED 2020. IEEE Computer Society, p. 117-122 6 p. 9137005. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2020-March).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2019

    Overview of 2019 CAD contest at ICCAD

    Schlichtmann, U., Das, S., Lin, I. C. & Lin, M. P. H., 2019 Nov, 2019 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 8942133. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2019-November).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    8 Citations (Scopus)

  • ROAD: Improving reliability of multi-core system via asymmetric aging

    Chen, Y. G., Lin, I. C. & Ke, J. T., 2019 Nov, 2019 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 8942178. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2019-November).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    3 Citations (Scopus)
  • 2018

    An efficient NBTI-aware wake-up strategy for power-gated designs

    Chiu, K. W., Chen, Y. G. & Lin, I. C., 2018 Apr 19, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., p. 901-904 4 p. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; vol. 2018-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    2 Citations (Scopus)
  • 2017

    Reducing aging on scratchpad memory using temporal- and FSM-based power management

    Law, Y. K., Lin, I-C. & Lin, C. C., 2017 Jun 5, 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 7939675. (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2015

    Analyzing the BTI effect on multi-bit retention registers

    Lin, I. C., Wang, Y. T., Yang, S. S. & Wu, Y. L., 2015, Intelligent Systems and Applications - Proceedings of the International Computer Symposium, ICS 2014. Chu, W. C-C., Yang, S. J-H. & Chao, H-C. (eds.). IOS Press, p. 269-278 10 p. (Frontiers in Artificial Intelligence and Applications; vol. 274).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    2 Citations (Scopus)
  • 2013

    High accuracy approximate multiplier with error correction

    Lin, C. H. & Lin, I-C., 2013 Jan 1, 2013 IEEE 31st International Conference on Computer Design, ICCD 2013. IEEE Computer Society, p. 33-38 6 p. 6657022. (2013 IEEE 31st International Conference on Computer Design, ICCD 2013).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    158 Citations (Scopus)

  • High-endurance hybrid cache design in CMP architecture with cache partitioning and access-aware policy

    Syu, S. M., Shao, Y. H. & Lin, I. C., 2013, GLSVLSI 2013 - Proceedings of the ACM International Conference of the Great Lakes Symposium on VLSI. p. 19-24 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    14 Citations (Scopus)

  • Impacts of NBTI and PBTI effects on ternary CAM

    Lee, Y. H., Lin, I-C. & Wang, S. W., 2013 Jul 5, Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013. p. 38-45 8 p. 6523588. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2012

    Aging-aware reliable multiplier design

    Cho, Y. H., Lin, I. C. & Yang, Y. M., 2012 Dec 1, Proceedings - IEEE International SOC Conference, SOCC 2012. p. 322-327 6 p. 6398335. (International System on Chip Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    1 Citation (Scopus)

  • Analyzing BTI effects on retention registers

    Wang, Y. T. & Lin, I-C., 2012 Nov 26, Proceedings of the 4th Asia Symposium on Quality Electronic Design, ASQED 2012. p. 71-77 7 p. 6320478. (Proceedings of the 4th Asia Symposium on Quality Electronic Design, ASQED 2012).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2011

    Analyzing throughput of power and thermal-constraint multicore processor under NBTI effect

    Zheng, S. Q., Lin, I. C. & Lee, Y. H., 2011, GLSVLSI'11 - Proceedings of the 2011 Great Lakes Symposium on VLSI. p. 415-418 4 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • TG-based technique for NBTI degradation and leakage optimization

    Lin, C. H., Lin, I. C. & Li, K. H., 2011, IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011. p. 133-138 6 p. 5993625. (Proceedings of the International Symposium on Low Power Electronics and Design).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    7 Citations (Scopus)
  • 2010

    Transaction-level error susceptibility for bus-based system-on-chip: From single-bit to multi-bit

    Zheng, S. Q. & Lin, I. C., 2010, ICS 2010 - International Computer Symposium. p. 670-675 6 p. 5685428. (ICS 2010 - International Computer Symposium).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2006

    Transaction level error susceptibility model for bus based SoC architectures

    Lin, I-C., Srinivasan, S., Vijaykrishnan, N. & Dhanwada, N., 2006 Dec 1, Proceedings - 7th International Symposium on Quality Electronic Design, ISQED 2006. p. 775-780 6 p. 1613230. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    9 Citations (Scopus)
  • 2005

    A power estimation methodology for SystemC transaction level models

    Dhanwada, N., Lin, I. C. & Narayanan, V., 2005, CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis. Association for Computing Machinery, p. 142-147 6 p. (CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    64 Citations (Scopus)