Jai-Ming Lin – Projects — National Cheng Kung University

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Phone886 6 2757575 ext 62400 2862
Emailjmlinee.ncku.edutw
Websitehttp://www.ee.ncku.edu.tw/subpage_div/teacher_new_2/index2.php?teacher_id=67

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Research activity per year

1 Active
16 Finished

16 results

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A Research of 2.5d/3d Ic Placement Approaches to Globally Optimize Wirelength and Routability for Multiple Dies
Lin, J.
23-08-01 → 24-07-31
Project: Research project
A Research of 2.5d/3d Ic Placement Approaches to Globally Optimize Wirelength and Routability for Multiple Dies
Lin, J.
22-08-01 → 23-07-31
Project: Research project
A fence-region driven die placement approach and a post-placement optimization flow for macros( II )
Lin, J.
22-04-01 → 23-03-31
Project: Research project
A Research of 2.5d/3d Ic Placement Approaches to Globally Optimize Wirelength and Routability for Multiple Dies
Lin, J.
21-08-01 → 22-07-31
Project: Research project
Wirelength-Driven Routability-Aware Die Placement and Package Routing through Better Bump Assignment in the Interposer-Based 3d Ic
Lin, J.
20-08-01 → 21-07-31
Project: Research project
Wirelength-Driven Routability-Aware Die Placement and Package Routing through Better Bump Assignment in the Interposer-Based 3d Ic
Lin, J.
19-08-01 → 20-07-31
Project: Research project
A Routability-Driven Floorplanner Following Pre-Assigned Module Constraint for a Monolithic 3d Ic with a Given Stacking Mode
Lin, J.
18-08-01 → 19-07-31
Project: Research project
A Routability-Driven Floorplanner Following Pre-Assigned Module Constraint for a Monolithic 3d Ic with a Given Stacking Mode
Lin, J.
17-08-01 → 18-07-31
Project: Research project
於積層型三維積體電路架構中廣泛的探討可行的實體設計流程
Lin, J.
16-08-01 → 17-07-31
Project: Research project
考量三維晶片平面規畫與除錯之低功耗動態調整電壓與頻率之設計方法-子計畫四：在三維晶片考量多重電壓源之整合型電源線規劃與平面規劃
Lin, J.
15-08-01 → 16-07-31
Project: Research project
考量三維晶片平面規畫與除錯之低功耗動態調整電壓與頻率之設計方法-子計畫四：在三維晶片考量多重電壓源之整合型電源線規劃與平面規劃
Lin, J.
14-08-01 → 15-07-31
Project: Research project
考量三維晶片平面規畫與除錯之低功耗動態調整電壓與頻率之設計方法-子計畫四：在三維晶片考量多重電壓源之整合型電源線規劃與平面規劃
Lin, J.
13-08-01 → 14-07-31
Project: Research project
具易測試及除錯特性之智慧型低功率多核心系統之設計技術研發：從電子系統層級至矽晶片層級-子計畫五：考量低功率及溫度最佳化之智慧型多核心平面規劃器(1/3)
Lin, J.
10-08-01 → 11-07-31
Project: Research project
為了擺置備份邏輯閘之漸進式邏輯閘擺置
Lin, J.
09-08-01 → 10-07-31
Project: Research project
為了擺置備份邏輯閘之漸進式邏輯閘擺置
Lin, J.
08-08-01 → 09-07-31
Project: Research project
於固定形狀晶片內考量先行擺置區塊之平面規劃(I)
Lin, J.
08-01-01 → 08-10-31
Project: Research project