• 1348 Citations
  • 19 h-Index
1990 …2020
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Research Output 1990 2019

1994
9 Citations (Scopus)

SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits

Lee, K-J., Njinda, C. A. & Breuer, M. A., 1994 Jan 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 13, 5, p. 625-637 13 p.

Research output: Contribution to journalArticle

Combinatorial circuits
Switches
Networks (circuits)
Transistors
Program processors
1993
5 Citations (Scopus)

A systematic method to classify scan cells

Lee, K. J., Lu, M. H. & Wang, J. F., 1993 Jan 1, ATS 1993 Proceedings - 2nd Asian Test Symposium. IEEE Computer Society, p. 219-224 6 p. 398808. (Proceedings of the Asian Test Symposium).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sequential circuits
Schematic diagrams
Networks (circuits)
1 Citation (Scopus)

New representation for programmable logic arrays to facilitate testing and logic design

Tang, J. J., Lee, K-J. & Liu, B-D., 1993, Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Publ by IEEE, p. 561-564 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Logic design
Testing
Decomposition
1992

A fast testing method for sequential circuits at the state transition level

Wang, W. L., Wang, J. F. & Lee, K-J., 1992 Jan 1, Proceedings International Test Conference, ITC 1992. Institute of Electrical and Electronics Engineers Inc., p. 514-519 6 p. 527863. (Proceedings - International Test Conference; vol. 1992-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sequential circuits
State Transition
Testing
Logic gates
Networks (circuits)
27 Citations (Scopus)
Networks (circuits)
Testing
Monitoring
Silicon on insulator technology
Sequential circuits
3 Citations (Scopus)

SWiTEST: a switch level test generation system for CMOS combinational circuits

Lee, K. J., Njinda, C. A. & Breuer, M. A., 1992 Dec 1, Proceedings - Design Automation Conference. Publ by IEEE, p. 26-29 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Combinatorial circuits
Switches
Networks (circuits)
Monitoring
Testing
1991
11 Citations (Scopus)

Constraints for using IDDQ testing to detect CMOS bridging faults

Lee, K-J. & Breuer, M. A., 1991 Jan 1, p. 303-308. 6 p.

Research output: Contribution to conferencePaper

Networks (circuits)
Monitoring
Testing
Sequential circuits
Logic circuits
1990
6 Citations (Scopus)

A new method for assigning signal flow directions to MOS transistors

Lee, K-J., Gupta, R. & Breuer, M. A., 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. Publ by IEEE, p. 492-495 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

MOSFET devices
Computer aided design
Networks (circuits)
19 Citations (Scopus)

A universal test sequence for CMOS scan registers

Lee, K. J. & Breuer, M. A., 1990 Dec 1, In : Proceedings of the Custom Integrated Circuits Conference.

Research output: Contribution to journalConference article

Monitoring
SPICE
Networks (circuits)
8 Citations (Scopus)
Networks (circuits)
Monitoring
15 Citations (Scopus)

On the charge sharing problem in CMOS stuck-open fault testing

Lee, K-J. & Breuer, M. A., 1990 Sep 1, Digest of Papers - International Test Conference. Publ by IEEE, p. 417-426 10 p. (Digest of Papers - International Test Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Monitoring
Testing
Capacitance
Networks (circuits)
Clocks
Control systems