• 1316 Citations
  • 19 h-Index
1990 …2020
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Research Output 1990 2019

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Conference article
2013
2 Citations (Scopus)

A new LFSR reseeding scheme via internal response feedback

Lien, W. C., Lee, K-J., Hsieh, T. Y. & Chakrabarty, K., 2013 Jan 1, In : Proceedings of the Asian Test Symposium. p. 97-102 6 p., 6690622.

Research output: Contribution to journalConference article

Seed
Feedback
Built-in self test
Networks (circuits)
Integrated circuits
2005
10 Citations (Scopus)

A complete memory address generator for scan based march algorithms

Wang, W. L. & Lee, K-J., 2005 Dec 9, In : Records of the IEEE International Workshop on Memory Technology, Design and Testing. p. 83-88 6 p.

Research output: Contribution to journalConference article

Data storage equipment
Shift registers
Feedback
Built-in self test
Clocks
25 Citations (Scopus)

An embedded processor based SOC test platform

Lee, K-J., Chu, C. Y. & Hong, Y. T., 2005 Dec 1, In : Proceedings - IEEE International Symposium on Circuits and Systems. p. 2983-2986 4 p., 1465254.

Research output: Contribution to journalConference article

Built-in self test
Controllers
Data storage equipment
Testing
Costs
2004
5 Citations (Scopus)

A low-cost diagnosis methodology for pipelined A/D converters

Huang, C. H., Lee, K-J. & Chang, S-J., 2004 Dec 1, In : Proceedings of the Asian Test Symposium. p. 296-301 6 p.

Research output: Contribution to journalConference article

Costs
Built-in self test
Time division multiplexing
Variable frequency oscillators
Networks (circuits)
2001
31 Citations (Scopus)

A token scan architecture for low power testing

Huang, T. C. & Lee, K-J., 2001 Dec 1, In : IEEE International Test Conference (TC). p. 660-669 10 p.

Research output: Contribution to journalConference article

Clocks
Testing
Networks (circuits)
Energy dissipation
Periodicity
2000
38 Citations (Scopus)

An on chip ADC test structure

Wen, Y. C. & Lee, K. J., 2000 Dec 1, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 221-225 5 p., 840042.

Research output: Contribution to journalConference article

Digital to analog conversion
Built-in self test
Specifications
Testing
60 Citations (Scopus)

Peak-power reduction for multiple-scan circuits during test application

Lee, K-J., Huang, T. C. & Chen, J. J., 2000 Dec 1, In : Proceedings of the Asian Test Symposium. p. 453-458 6 p.

Research output: Contribution to journalConference article

Networks (circuits)
Testing
1999
32 Citations (Scopus)

Input control technique for power reduction in scan circuits during test application

Huang, T. C. & Lee, K-J., 1999 Dec 1, In : Proceedings of the Asian Test Symposium. p. 315-320 6 p.

Research output: Contribution to journalConference article

Networks (circuits)
1997
6 Citations (Scopus)

Built-in current sensor designs based on the bulk-driven technique

Huang, T. C., Huang, M. C. & Lee, K-J., 1997 Dec 1, In : Proceedings of the Asian Test Symposium. p. 384-388 5 p.

Research output: Contribution to journalConference article

Sensors
Energy dissipation
Mirrors
Degradation
Networks (circuits)
1996
2 Citations (Scopus)

Combination of automatic test pattern generation and built-in intermediate voltage sensing for detecting CMOS bridging faults

Lee, K-J., Tang, J. J., Huang, T. C. & Tsai, C. L., 1996 Dec 1, In : Proceedings of the Asian Test Symposium. p. 100-105 6 p.

Research output: Contribution to journalConference article

Automatic test pattern generation
Electric potential
Networks (circuits)
Monitoring
Sensors
6 Citations (Scopus)

Two modeling techniques for CMOS circuits to enhance test generation and fault simulation for bridging faults

Lee, K-J. & Tang, J. J., 1996 Dec 1, In : Proceedings of the Asian Test Symposium. p. 165-170 6 p.

Research output: Contribution to journalConference article

Networks (circuits)
SPICE
Transistors
Electric potential
1995
2 Citations (Scopus)

New architecture for analog boundary scan

Lee, K-J., Jeng, S. Y. & Lee, T. P., 1995 Jan 1, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 409-412 4 p.

Research output: Contribution to journalConference article

Digital circuits
Analog circuits
Testing
1990
17 Citations (Scopus)

A universal test sequence for CMOS scan registers

Lee, K. J. & Breuer, M. A., 1990 Dec 1, In : Proceedings of the Custom Integrated Circuits Conference.

Research output: Contribution to journalConference article

Monitoring
SPICE
Networks (circuits)