Projects per year
Personal profile
Education
- 2013 PhD, Electrical Engineering, KULeuven, Belgium
Research Interests
- Semiconductor Physics and Devices
Experience
- 2009~2013 PhD researcher, Inter-university Microelectronic Centre (imec), Belgium
- 2014~present Assistant Professor, Department of Electrical Engineering, National Cheng Kung University, Taiwan
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Network
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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量子電子元件與人工智慧於半導體產業之應用 : 機器學習導向之量子傳輸模擬 及 與現今半導體製程相容之新穎元件製作( V )
22-02-01 → 23-01-31
Project: Research project
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量子電子元件與人工智慧於半導體產業之應用 : 機器學習導向之量子傳輸模擬 及 與現今半導體製程相容之新穎元件製作( IV )
21-02-01 → 22-01-31
Project: Research project
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量子電子元件與人工智慧於半導體產業之應用 : 機器學習導向之量子傳輸模擬及與現今半導體製程相容之新穎元件製作(3/5)
20-02-01 → 21-01-31
Project: Research project
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量子電子元件與人工智慧於半導體產業之應用 : 機器學習導向之量子傳輸模擬 及 與現今半導體製程相容之新穎元件製作(2/5)
19-02-01 → 20-01-31
Project: Research project
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量子電子元件與人工智慧於半導體產業之應用 : 機器學習導向之量子傳輸模擬 及 與現今半導體製程相容之新穎元件製作(2/5)
19-02-01 → 20-01-31
Project: Research project
Research output
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Demonstration of synaptic characteristics of polycrystalline-silicon ferroelectric thin-film transistor for application of neuromorphic computing
Ma, W. C. Y., Su, C. J., Lee, Y. J., Kao, K. H., Chang, T. H., Chang, J. C., Wu, P. H., Yen, C. L. & Lin, J. H., 2022 Apr 1, In: Semiconductor Science and Technology. 37, 4, 045003.Research output: Contribution to journal › Article › peer-review
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First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration with Dual Work Function Gate for Ultralow-Power SRAM and RF Applications
Chang, S. W., Lu, T. H., Yang, C. Y., Yeh, C. J., Huang, M. K., Meng, C. F., Chen, P. J., Chang, T. H., Chang, Y. S., Jhu, J. W., Hong, T. C., Ke, C. C., Yu, X. R., Lu, W. H., Baig, M. A., Cho, T. C., Sung, P. J., Su, C. J., Hsueh, F. K., Chen, B. Y. & 21 others, , 2022 Apr 1, In: IEEE Transactions on Electron Devices. 69, 4, p. 2101-2107 7 p.Research output: Contribution to journal › Article › peer-review
1 Citation (Scopus) -
Linking Room- and Low-Temperature Electrical Performance of MOS Gate Stacks for Cryogenic Applications
Kao, K. H., Godfrin, C., Elsayed, A., Li, R., Simoen, E., Grill, A., Kubicek, S., Radu, I. P. & Govoreanu, B., 2022 May 1, In: IEEE Electron Device Letters. 43, 5, p. 674-677 4 p.Research output: Contribution to journal › Article › peer-review
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First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3D Integration with Dual Workfunction Gate for Ultra Low-power SRAM and RF Applications
Chang, S. W., Lu, T. H., Yang, C. Y., Yeh, C. J., Huang, M. K., Meng, C. F., Chen, P. J., Chang, T. H., Chang, Y. S., Jhu, J. W., Hong, T. Z., Ke, C. C., Yu, X. R., Lu, W. H., Baig, M. A., Cho, T. C., Sung, P. J., Su, C. J., Hsueh, F. K., Chen, B. Y. & 21 others, , 2021, 2021 IEEE International Electron Devices Meeting, IEDM 2021. Institute of Electrical and Electronics Engineers Inc., p. 34.4.1-34.4.4 (Technical Digest - International Electron Devices Meeting, IEDM; vol. 2021-December).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Inherent Dipole Layer Formation Driven by Surface Energy at Nonplanar Dielectric Interface
Fang, Y., Lee, W. J., Yang, A. C., Chen, G. P., Chen, N. Y. & Kao, K. H., 2021 Jan, In: IEEE Transactions on Electron Devices. 68, 1, p. 294-298 5 p., 9288738.Research output: Contribution to journal › Article › peer-review
1 Citation (Scopus)