Projects per year
Personal profile
Education
- 2003 PhD, VLSI and Circuit Design, Purdue University, School of Electrical and Computer Engineering, West Lafayette, IN
Research Interests
- CAD for VLSI
- Power-efficient design in both hardware and software
- Reconfigurable computing
Experience
- 1992~present Active Member IEEE
- 1998 Summer Intern Lucent Technology, Holmdel, NJ.;Summer
- 2003~2009 Assistant Professor Dept. of Electrical Engineering, National Cheng Kung University
- 2010~present Associate Professor Dept. of Electrical Engineering, National Cheng Kung University
Fingerprint Dive into the research topics where Lih-Yih Chiou is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 22 Similar Profiles
Data storage equipment
Engineering & Materials Science
Networks (circuits)
Engineering & Materials Science
Static random access storage
Engineering & Materials Science
Electric potential
Engineering & Materials Science
Electric power utilization
Engineering & Materials Science
Flip flop circuits
Engineering & Materials Science
ROM
Engineering & Materials Science
Hardware
Engineering & Materials Science
Network
Recent external collaboration on country level. Dive into details by clicking on the dots.
Projects 2004 2020
具高安全性且低耗能之物聯網晶片電路及系統之分析、設計與實作-子計畫一：具硬體安全性及能量效益的物聯網微處理器及記憶體設計之研究(2/2)
19-05-01 → 20-04-30
Project: Research project
考量三維晶片平面規畫與除錯之低功耗動態調整電壓與頻率之設計方法-子計畫一：適用於高能源效益三維晶片之智慧型功率與溫度管理架構及電路之研發
15-08-01 → 16-07-31
Project: Research project
具能量效率之異質性架構系統中介語言GPU 之設計與實現-子計畫三：應用於HSAIL GPU之具能耗效率系統架構設計探勘及實現
15-05-01 → 16-04-30
Project: Research project
考量三維晶片平面規畫與除錯之低功耗動態調整電壓與頻率之設計方法-子計畫一：適用於高能源效益三維晶片之智慧型功率與溫度管理架構及電路之研發
14-08-01 → 15-07-31
Project: Research project
Research Output 1994 2019
A data-traffic aware dynamic power management for general-purpose graphics processing units
Chiou, L-Y., Yang, C. K. & Chang, C. P., 2019 Jan 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702405. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Hardware
Artificial intelligence
Learning systems
Electric power utilization
Power management
A reliable delay-based physical unclonable function with dark-bit avoidance
Chiou, L-Y., Wu, C. H. & Wei, P. C., 2019 Jan 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702131. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Bit error rate
Energy efficiency
Hardware security
Internet of things
Secure communication
Fast Steady-State Thermal Analysis
Chiou, L-Y., Chang, C. H., Lu, L. Y., Yang, W. H., Chang, Y. J. & Lu, J. M., 2019 Feb 22, Proceedings - International SoC Design Conference 2018, ISOCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 15-16 2 p. 8649912. (Proceedings - International SoC Design Conference 2018, ISOCC 2018).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Thermoanalysis
Hot Temperature
2
Citations
(Scopus)
Highly Reliable Two-Step Charge-Pump Read Scheme for 1.5 F2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM
Chien, T. K., Chiou, L-Y., Chang, C. S., Huang, J. Y., Wu, C. H., Lee, H. Y. & Sheu, S. S., 2018 Sep 1, In : IEEE Transactions on Circuits and Systems II: Express Briefs. 65, 9, p. 1234-1238 5 p., 8123866.Research output: Contribution to journal › Article
Pumps
Data storage equipment
Transistors
Flash memory
Macros
Single bit-line 8T SRAM cell with asynchronous dual word-line control for bitinterleaved ultra-low voltage operation
Huang, C. R. & Chiou, L-Y., 2018 Nov 1, In : IET Circuits, Devices and Systems. 12, 6, p. 713-719 7 p.Research output: Contribution to journal › Article
Data storage equipment
Electric potential
Transistors
Electric power utilization
Silicon
Thesis
A highly effective transient thermal simulator using matrix convolution at Electronic System Level for three-dimensional integrated circuits
Author: 鈺雄, 蘇., 2014 Dec 4Supervisor: Chiou, L. (Supervisor)
Student thesis: Master's Thesis
A PVT-Variation Tolerant and High Power-Efficient Sub-threshold SRAMs with Read Leakage Sensing
Author: 昌杰, 鄭., 2014 Sep 10Supervisor: Chiou, L. (Supervisor)
Student thesis: Master's Thesis
Design of a Saving-Write-Energy Non-Volatile SRAM
Author: 亦淞, 鄒., 2014 Sep 11Supervisor: Chiou, L. (Supervisor)
Student thesis: Master's Thesis
具可靠度的近臨界電壓記憶體式物理不可複製函數
Author: 境昱, 黃., 2019Supervisor: Chiou, L. (Supervisor)
Student thesis: Master's Thesis
可從250毫伏到1 2伏的廣輸入範圍且具有高?率轉換效率之太陽能能量擷取電路設計
Author: 暐哲, 林., 2014 Sep 10Supervisor: Chiou, L. (Supervisor)
Student thesis: Master's Thesis