Projects per year
Personal profile
Education
- 2003 PhD, VLSI and Circuit Design, Purdue University, School of Electrical and Computer Engineering, West Lafayette, IN
Research Interests
- CAD for VLSI
- Power-efficient design in both hardware and software
- Reconfigurable computing
Experience
- 1992~present Active Member IEEE
- 1998 Summer Intern Lucent Technology, Holmdel, NJ.;Summer
- 2003~2009 Assistant Professor Dept. of Electrical Engineering, National Cheng Kung University
- 2010~present Associate Professor Dept. of Electrical Engineering, National Cheng Kung University
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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Collaborations and top research areas from the last five years
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Projects
- 20 Finished
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具高安全性且低耗能之物聯網晶片電路及系統之分析、設計及實作-子計畫一：具硬體安全性及能量效益的物聯網微處理器及記憶體設計之研究( II )
Chiou, L.-Y. (PI)
21-05-01 → 22-04-30
Project: Research project
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具高安全性且低耗能之物聯網晶片電路及系統之分析、設計及實作-子計畫一：具硬體安全性及能量效益的物聯網微處理器及記憶體設計之研究( I )
Chiou, L.-Y. (PI)
20-05-01 → 21-04-30
Project: Research project
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具高安全性且低耗能之物聯網晶片電路及系統之分析、設計與實作-子計畫一：具硬體安全性及能量效益的物聯網微處理器及記憶體設計之研究(2/2)
Chiou, L.-Y. (PI)
19-05-01 → 20-04-30
Project: Research project
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具高安全性且低耗能之物聯網晶片電路及系統之分析、設計與實作-子計畫一：具硬體安全性及能量效益的物聯網微處理器及記憶體設計之研究(2/2)
Chiou, L.-Y. (PI)
19-05-01 → 20-04-30
Project: Research project
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An Effective Neural Network Model Protection Method Against Model Stealing Attacks for Image Classification Applications
Chiou, L. Y., Lee, Y. H., Chiu, C. C. & Hsu, S. H., 2024, Proceedings - International SoC Design Conference 2024, ISOCC 2024. Institute of Electrical and Electronics Engineers Inc., p. 125-126 2 p. (Proceedings - International SoC Design Conference 2024, ISOCC 2024).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Design and Analysis of an Energy-efficient Duo-Core SRAM-based Compute-in-Memory Accelerator
Chiou, L. Y., Shih, H. M., Hsu, S. H., Sheng, Z. C. & Chang, S. J., 2024, ISCAS 2024 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., (Proceedings - IEEE International Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Fast Performance and Power Profiler for SRAM Compute-in-Memory-based Accelerators
Chiou, L. Y., Shih, H. M., Hsu, S. H. & Tsai, T. J., 2024, Proceedings - International SoC Design Conference 2024, ISOCC 2024. Institute of Electrical and Electronics Engineers Inc., p. 360-361 2 p. (Proceedings - International SoC Design Conference 2024, ISOCC 2024).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Performance Improvement of AlN-Based RRAMs Using Ag Layer for Hardware Security Applications
Min, K. P., Li, C. Y., Wang, T. J., Tsai, C. C., Chu, S. Y. & Chiou, L. Y., 2023 Aug 1, In: IEEE Transactions on Electron Devices. 70, 8, p. 4115-4121 7 p.Research output: Contribution to journal › Article › peer-review
1 Citation (Scopus) -
An Energy-Efficient Conditional Biasing Write Assist with Built-In Time-Based Write-Margin-Tracking for Low-Voltage SRAM
Huang, C. R. & Chiou, L. Y., 2021 Aug, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29, 8, p. 1586-1590 5 p., 9448190.Research output: Contribution to journal › Article › peer-review
6 Citations (Scopus)