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Research Output 1994 2019

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Conference contribution
2019

A data-traffic aware dynamic power management for general-purpose graphics processing units

Chiou, L-Y., Yang, C. K. & Chang, C. P., 2019 Jan 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702405. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Artificial intelligence
Learning systems
Electric power utilization
Power management

A reliable delay-based physical unclonable function with dark-bit avoidance

Chiou, L-Y., Wu, C. H. & Wei, P. C., 2019 Jan 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702131. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bit error rate
Energy efficiency
Hardware security
Internet of things
Secure communication

A variation-tolerant bitline leakage sensing scheme for near-threshold SRAMs

Chiou, L-Y., Huang, C. R., Cheng, C. C., Huang, J. Y. & Ling, W. S., 2019 Apr 1, 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc., 8741606. (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Static random access storage
Macros
Electric power utilization
leakage
thresholds

Fast Steady-State Thermal Analysis

Chiou, L-Y., Chang, C. H., Lu, L. Y., Yang, W. H., Chang, Y. J. & Lu, J. M., 2019 Feb 22, Proceedings - International SoC Design Conference 2018, ISOCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 15-16 2 p. 8649912. (Proceedings - International SoC Design Conference 2018, ISOCC 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Thermoanalysis
Hot Temperature

Intelligent Policy Selection for GPU Warp Scheduler

Chiou, L-Y., Yang, T. H., Syu, J. T., Chang, C. P. & Chang, Y. J., 2019 Mar 1, Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019. Institute of Electrical and Electronics Engineers Inc., p. 302-303 2 p. 8771596. (Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Learning systems
Static analysis
Computer vision
Hardware
Graphics processing unit
2018

Ultra-Low Standby Power SRAM with Adaptive Data-Retention-Voltage-Regulating Scheme

Huang, C. R., Wu, K. L., Wu, C. H. & Chiou, L-Y., 2018 Apr 26, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8350944. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2018-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Static random access storage
Electric potential
Integrated circuits
Energy dissipation
Electric power utilization
2017

A novel clock-pulse-width calibration technique for charge redistribution DACs

Cruz, H., Huang, H. Y., Luo, C. H., Chiou, L-Y. & Lee, S-Y., 2017 Sep 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050483. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Digital to analog conversion
Clocks
Calibration
Electric potential
Field programmable gate arrays (FPGA)
1 Citation (Scopus)

Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture

Chien, T. K., Chiou, L-Y., Cheng, C. W., Sheu, S. S., Wang, P. H., Tsai, M. J. & Wu, C. I., 2017 Jan 3, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., p. 461-464 4 p. 7804003. (2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory architecture
Dynamic random access storage
Program processors
Computer systems
Data storage equipment
1 Citation (Scopus)

Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches

Chien, T. K., Chiou, L-Y., Tsou, Y. S., Sheu, S. S., Wang, P. H., Tsai, M. J. & Wu, C. I., 2017 Aug 11, ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 8009153. (Proceedings of the International Symposium on Low Power Electronics and Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Static random access storage
Energy conservation
Data storage equipment
Controllers
2016
6 Citations (Scopus)

A low store energy and robust ReRAM-based flip-flop for normally off microprocessors

Chien, T. K., Chiou, L-Y., Chuang, Y. C., Sheu, S. S., Li, H. Y., Wang, P. H., Ku, T. K., Tsai, M. J. & Wu, C. I., 2016 Jul 29, ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., p. 2803-2806 4 p. 7539175. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2016-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flip flop circuits
Microprocessor chips
Microsystems
Data storage equipment
Restoration
8 Citations (Scopus)

An energy-efficient nonvolatile microprocessor considering software-hardware interaction for energy harvesting applications

Chien, T. K., Chiou, L-Y., Lee, C. C., Chuang, Y. C., Ke, S. H., Sheu, S. S., Li, H. Y., Wang, P. H., Ku, T. K., Tsai, M. J. & Wu, C. I., 2016 May 31, 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016. Institute of Electrical and Electronics Engineers Inc., 7482577. (2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy harvesting
microprocessors
Microprocessor chips
hardware
Nonvolatile storage
3 Citations (Scopus)

A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling

Lu, L. Y., Chang, C. Y., Chen, Z. H., Yeh, B. T., Lu, T. H., Chen, P. Y., Tang, P. H., Lee, K-J., Chiou, L-Y., Chang, S-J., Tsai, C-H., Chen, C-H. & Lin, J-M., 2016 Mar 7, 2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016. Institute of Electrical and Electronics Engineers Inc., p. 17-18 2 p. 7427980. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 25-28-January-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Microprocessor chips
Temperature
Voltage scaling
Dynamic frequency scaling
2 Citations (Scopus)

Design of A 0.3V-1.2V wide input range solar energy harvesting circuit with high converting power efficiency

Chiou, L-Y., Lin, W. J., Huang, C. R. & Lo, S. K., 2016 Aug 9, Proceedings of the 2nd International Conference on Intelligent Green Building and Smart Grid, IGBSG 2016. Lachmanova, M. & Maga, D. (eds.). Institute of Electrical and Electronics Engineers Inc., 7539439. (Proceedings of the 2nd International Conference on Intelligent Green Building and Smart Grid, IGBSG 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy harvesting
Solar energy
Networks (circuits)
Electric potential
Conversion efficiency
2015
2 Citations (Scopus)

A limited-contention cross-coupled level shifter for energy-efficient subthreshold-to-superthreshold voltage conversion

Huang, C. R. & Chiou, L-Y., 2015 Apr 16, ISOCC 2014 - International SoC Design Conference. Institute of Electrical and Electronics Engineers Inc., p. 142-143 2 p. 7087667. (ISOCC 2014 - International SoC Design Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Electric potential
Transistors
Diodes

An effective matrix compression method for GPU-accelerated thermal analysis

Chiou, L-Y., Lu, L. Y. & Lin, C. Y., 2015 May 28, 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015. Institute of Electrical and Electronics Engineers Inc., 7114505

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Thermoanalysis
Temperature distribution
Costs
Graphics processing unit
Hot Temperature

The SoC design of a versatile biomedical signal processor for potentiostat

Huang, C. P., Shyu, Y. T., Hsieh, T. Y., Cheng, C. W., Liu, W. C., Jian, H. T., Wang, Y. W., Liu, B-D., Chang, S-J., Chiou, L-Y. & Chen, C-H., 2015 Dec 2, 4th International Symposium on Bioelectronics and Bioinformatics, ISBB 2015. Institute of Electrical and Electronics Engineers Inc., p. 59-62 4 p. 7344923. (4th International Symposium on Bioelectronics and Bioinformatics, ISBB 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Melatonin
Potassium
Experiments
potassium ferrocyanide
2014
2 Citations (Scopus)

An ultra-low-power adaptive-body-bias control for subthreshold circuits

Luo, S. C., Huang, C. R. & Chiou, L-Y., 2014, Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014. IEEE Computer Society, 6834901

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Electric power utilization
Sensor nodes
Power management
Voltage scaling
3 Citations (Scopus)

A power-efficient pulse-based in-situ timing error predictor for PVT-variation sensitive circuits

Chiou, L-Y., Huang, C. R. & Wu, M. H., 2014 Jan 1, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., p. 1215-1218 4 p. 6865360. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Electric potential
Integrated circuits
Costs
2013
1 Citation (Scopus)

System thermal analysis of 3D IC on ESL virtual platform

Chiou, L-Y., Lu, L. Y., Chen, Z. H., Su, Y. H., Yeh, J. C., Chen, Y. F. & Lin, S. C., 2013 Jan 1, ISOCC 2013 - 2013 International SoC Design Conference. IEEE Computer Society, p. 394-397 4 p. 6864060. (ISOCC 2013 - 2013 International SoC Design Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error analysis
Thermoanalysis
Temperature control
Systems analysis
Experiments
2012

Buffer size minimization method considering mix-clock domains and discontinuous data access

Chiou, L-Y., Lu, L. Y., Lin, B. C. & Su, A. P., 2012 Dec 1, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. p. 380-383 4 p. 6419051. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Coloring
Clocks
Synchronization
Throughput
2 Citations (Scopus)

Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Chang, M. F., Lin, K. F., Chuang, C. H., Huang, L. Y., Chien, T. F., Sheu, S. S., Su, K. L., Lee, H. Y., Chen, F. T., Lien, C. H., Chen, P. C., Chiou, L-Y., Ku, T. K., Tsai, M. J. & Kao, M. J., 2012 Dec 1, ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 6467794. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Networks (circuits)
Flash memory
Bias voltage
Energy utilization
4 Citations (Scopus)

Minimum convertible voltage analysis for ratioless and robust subthreshold level conversion

Luo, S. C., Huang, C. R. & Chiou, L-Y., 2012, ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. p. 2553-2556 4 p. 6271824

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Threshold voltage
Transistors
Electric potential
Networks (circuits)
Ubiquitous computing
2011
1 Citation (Scopus)

A fast and effective dynamic trace-based method for analyzing architectural performance

Chen, Y. S., Chiou, L-Y. & Chang, H. H., 2011 Mar 28, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 591-596 6 p. 5722258. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chemical analysis
1 Citation (Scopus)

Energy-aware partitioning for on-chip bus architecture using a multi-objective genetic algorithm

Chiou, L-Y., Chen, Y. S. & Jian, Y. L., 2011 Jun 28, Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011. p. 345-348 4 p. 5783544. (Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Genetic algorithms
Hardware
Clustering algorithms
Power management
Costs
2010

Adaptive minimum supply voltage for subthreshold circuits considering noise margin and PT variations

Luo, S. C. & Chiou, L-Y., 2010 Sep 20, 1st International Conference on Green Circuits and Systems, ICGCS 2010. p. 499-503 5 p. 5543012. (1st International Conference on Green Circuits and Systems, ICGCS 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Electric potential
Energy harvesting
Scalability
Electric power utilization
2 Citations (Scopus)

A subthreshold SRAM cell with autonomous bitline-voltage clamping

Luo, S. C. & Chiou, L-Y., 2010 Dec 1, 2010 International Symposium on Next-Generation Electronics, ISNE 2010 - Conference Program. p. 150-153 4 p. 5669177. (2010 International Symposium on Next-Generation Electronics, ISNE 2010 - Conference Program).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Static random access storage
Electric potential
Clamping devices
Electronic equipment
Data storage equipment
1 Citation (Scopus)

Peak current reduction using an MTCMOS technique

Lu, L. Y., Wu, T. Y., Chiou, L-Y. & Shi, J. W., 2010, Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010. p. 255-259 5 p. 5548248

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Scheduling
Digital circuits
Leakage currents
Networks (circuits)
2007
8 Citations (Scopus)

Active filter based on-chip step-down DC-DC switching voltage regulator

Wu, C. H., Chang-Chien, L-R. & Chiou, L-Y., 2007 May 31, TENCON 2005 - 2005 IEEE Region 10 Conference. 4085240. (IEEE Region 10 Annual International Conference, Proceedings/TENCON; vol. 2007).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Voltage regulators
Active filters
Networks (circuits)
Low pass filters
Voltage control

Aggressive look-ahead earliest deadline first algorithm

Chiou, L-Y., Lim, H. E. & Chen, Y. S., 2007 Dec 1, TENCON 2007 - 2007 IEEE Region 10 Conference. 4428980. (IEEE Region 10 Annual International Conference, Proceedings/TENCON).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy utilization
Electric potential
Experiments
Voltage scaling
Dynamic frequency scaling
2006

An efficient VLSI architecture of frequency domain kurtosis for non-stationary acoustic noise measurements

Lei, S-F., Chiou, L-Y., Lee, H. W. & Liu, B-D., 2006, 2006 International Conference on Communications, Circuits and Systems, ICCCAS, Proceedings - Circuits and Systems. Vol. 4. p. 2718-2722 5 p. 4064478

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Acoustic noise measurement
Audition
Acoustic noise
Conservation

Asynchronous design methodology for an efficient implementation of low power ALU

Manikandan, P., Liu, B-D., Chiou, L-Y., Sundar, G. & Mandal, C. R., 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. p. 590-593 4 p. 4145462

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Rails
Transistors
Electric power utilization
Silicon
11 Citations (Scopus)

Energy-efficient adaptive clocking dual edge sense-amplifier flip-flop

Liu, Y. T., Chiou, L-Y. & Chang, S-J., 2006 Dec 1, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 4329-4332 4 p. 1693587. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flip flop circuits
Transistors
Electric power utilization
2005

Design and implementation of an efficient architecture for higher order statistics with DWT

Chiou, L-Y., Lee, H. W., Lei, S-F. & Liu, B-D., 2005 Dec 1, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT). p. 287-290 4 p. 1500077. (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Higher order statistics
Statistics
Hardware
2004
3 Citations (Scopus)

A low supply noise content-sensitive ROM architecture for SoC

Chang, M. F., Chiou, L-Y. & Wen, K. A., 2004, Proceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology. Vol. 2. p. 1021-1024 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

ROM
Electric power utilization
Macros
System-on-chip
Experiments
1996

Simultaneous partitioning, scheduling and allocation for synthesis of multi-chip module architectures

Cherabuddi, R. V., Chiou, L-Y. & Bayoumi, M. A., 1996, Proceedings of the International Conference on the Economics of Design, Test, and Manufacturing. IEEE, p. 129-135 7 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Scheduling
Combinatorial optimization
Simulated annealing
Digital signal processing
Program processors