Projects per year
Personal profile
Education
- 2001 PhD, Electrical and Computer Engineering, University of Florida
Research Interests
- Modeling and Simulation
- Semiconductor Device Physics
Experience
- 2001~2003 Senior Device Engineer, AMD
- 2003/02 ~ 2014/01 Faculty Member, Department of Electronic Engineering, National Ilan University
- 2014/02 ~ 2015/7 Associate Professor, Department of Electrical Engineering, National Cheng Kung University
- 2015/08 ~ present Professor, Department of Electrical Engineering, National Cheng Kung University
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Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
Projects
- 5 Finished
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Extracting Device Parameters of TFTs With Ultrathin Channels at Low Temperatures by Particle Swarm Optimization
Chen, Y. C., Chou, J. P., Chen, K. C., Lin, J-F., Ma, W. C. Y., Kao, K. H., Chiang, M. H. & Wang, Y-H., 2024, In: IEEE Transactions on Electron Devices. 71, 8, p. 4717-4722 6 p.Research output: Contribution to journal › Article › peer-review
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First Demonstration of Defect Elimination for Cryogenic Ge FinFET CMOS Inverter Showing Steep Subthreshold Slope by Using Ge-on-Insulator Structure
Yu, X. R., Hsieh, C. C., Chuang, M. H., Chiu, M. Y., Sun, T. C., Geng, W. Z., Chang, W. H., Shih, Y. J., Lu, W. H., Chang, W. C., Lin, Y. C., Pai, Y. C., Lai, C. Y., Chuang, M. H., Dei, Y., Yang, C. Y., Lu, H. Y., Lin, N. C., Wu, C. T., Kao, K. H., & 9 others, 2023, 2023 International Electron Devices Meeting, IEDM 2023. Institute of Electrical and Electronics Engineers Inc., (Technical Digest - International Electron Devices Meeting, IEDM).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology
Chiang, H. L., Hadi, R. A., Wang, J. F., Han, H. C., Wu, J. J., Hsieh, H. H., Horng, J. J., Chou, W. S., Lien, B. S., Chang, C. H., Chen, Y. C., Wang, Y. H., Chen, T. C., Liu, J. C., Liu, Y. C., Chiang, M. H., Kao, K. H., Pulicherla, B., Cai, J., Chang, C. S., & 9 others, 2023, 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023. Institute of Electrical and Electronics Engineers Inc., (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2023-June).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
6 Citations (Scopus) -
Modeling of Bilayer Modulated RRAM and Its Array Performance for Compute-in-Memory Applications
Lee, J. W., Chou, T. C., Chen, P. A. & Chiang, M. H., 2023 Dec 1, In: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 9, 2, p. 151-158 8 p.Research output: Contribution to journal › Article › peer-review
Open Access3 Citations (Scopus) -
MOSFET Characterization with Reduced Supply Voltage at Low Temperatures for Power Efficiency Maximization
Lin, W. C., Huang, H. P., Kao, K. H., Chiang, M. H., Lu, D., Hsu, W. C., Wang, Y. H., Ma, W. C. Y., Tsai, H. H., Lee, Y. J., Chiang, H. L., Wang, J. F. & Radu, I., 2023, ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference. Editions Frontieres, p. 9-12 4 p. (European Solid-State Device Research Conference; vol. 2023-September).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus)