If you made any changes in Pure these will be visible here soon.

Personal profile

Education

  • 2001 PhD, Electrical and Computer Engineering, University of Florida

Research Interests

  • Modeling and Simulation
  • Semiconductor Device Physics

Experience

  • 2001~2003 Senior Device Engineer, AMD
  • 2003/02 ~ 2014/01 Faculty Member, Department of Electronic Engineering, National Ilan University
  • 2014/02 ~ 2015/7 Associate Professor, Department of Electrical Engineering, National Cheng Kung University
  • 2015/08 ~ present Professor, Department of Electrical Engineering, National Cheng Kung University

Fingerprint Dive into the research topics where Meng-Hsueh Chiang is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

  • 2 Similar Profiles
Nanowires Engineering & Materials Science
Static random access storage Engineering & Materials Science
Phase change memory Engineering & Materials Science
Field effect transistors Engineering & Materials Science
Transistors Engineering & Materials Science
Doping (additives) Engineering & Materials Science
Silicon Engineering & Materials Science
High electron mobility transistors Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Projects 2016 2018

Research Output 1998 2019

  • 673 Citations
  • 12 h-Index
  • 47 Conference contribution
  • 38 Article
  • 2 Conference article
  • 1 Paper

An RRAM with a 2D material embedded double switching layer for neuromorphic computing

Chen, P. A., Ge, R. J., Lee, J. W., Hsu, C. H., Hsu, W-C., Akinwande, D. & Chiang, M-H., 2019 Jan 8, 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018. Institute of Electrical and Electronics Engineers Inc., 8605915. (2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

random access memory
oxygen ions
plastic properties
Plasticity
Ions

Atomristors: Memory Effect in Atomically-thin Sheets and Record RF Switches

Ge, R., Wu, X., Kim, M., Chen, P. A., Shi, J., Choi, J., Li, X., Zhang, Y., Chiang, M-H., Lee, J. C. & Akinwande, D., 2019 Jan 16, 2018 IEEE International Electron Devices Meeting, IEDM 2018. Institute of Electrical and Electronics Engineers Inc., p. 22.6.1-22.6.4 8614602. (Technical Digest - International Electron Devices Meeting, IEDM; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

switches
Switches
Data storage equipment
Monolayers
Sulfur

Insights to the scaling impact on back-gate biasing for FD SOI MOSFETs

Chang, M. Y., Wang, L. J. & Chiang, M-H., 2019 Feb 11, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 8640185. (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

SOI (semiconductors)
field effect transistors
thin bodies
inversions
scaling

Simulation-based study of high-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

Wu, Y. T., Ding, F., Connelly, D., Chiang, M-H., Chen, J-F. & Liu, T. J. K., 2019 Apr 1, In : IEEE Transactions on Electron Devices. 66, 4, p. 1754-1759 6 p., 8661752.

Research output: Contribution to journalArticle

Static random access storage
Oxides
Nanowires
Transistors
Electric potential

Speed Optimization of Vertically Stacked Gate-All-Around MOSFETs with Inner Spacers for Low Power and Ultra-Low Power Applications

Huang, Y. C., Chiang, M-H. & Wang, S-J., 2019 Apr 23, Proceedings of the 20th International Symposium on Quality Electronic Design, ISQED 2019. IEEE Computer Society, p. 231-234 4 p. 8697706. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2019-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Controllability
Leakage currents
Masks
Capacitance
Tuning

Thesis

Analysis of the Multi-Vt FD-SOI MOSFETs and SRAM Application

Author: 政邑, 陳., 2018 Jan 16

Supervisor: Chiang, M. (Supervisor)

Student thesis: Master's Thesis

Characterization and Analysis of Oxide Interface Charge for FinFETs

Author: 如諒, 賴., 2017 Jun 21

Supervisor: Chiang, M. (Supervisor)

Student thesis: Master's Thesis

Characterization and Modeling of Via Resistance for FinFETs

Author: 博任, 楊., 2018 Feb 7

Supervisor: Chiang, M. (Supervisor)

Student thesis: Master's Thesis

Modeling of IGZO Thin-Film Transistors for Circuit Simulations

Author: 欣翰, 李., 2018 Jun 26

Supervisor: Chiang, M. (Supervisor)

Student thesis: Master's Thesis

Performance Optimization of Gate-All-Around MOSFETs by Inner Spacers at 5 nm Technology Node

Author: 仕豪, 陳., 2018 Feb 7

Supervisor: Chiang, M. (Supervisor)

Student thesis: Master's Thesis