Meng-Hsueh Chiang

Professor

https://orcid.org/0000-0003-4789-6302

Phone886 6 2757575 ext 62418
Emailmhchiang@mail.ncku.edu.tw
Websitehttp://www.ee.ncku.edu.tw/subpage_div/teacher_new_2/index2.php?teacher_id=72

707 Citations
12 h-Index

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Personal profile

Education

2001 PhD, Electrical and Computer Engineering, University of Florida

Research Interests

Modeling and Simulation
Semiconductor Device Physics

Experience

2001~2003 Senior Device Engineer, AMD
2003/02 ~ 2014/01 Faculty Member, Department of Electronic Engineering, National Ilan University
2014/02 ~ 2015/7 Associate Professor, Department of Electrical Engineering, National Cheng Kung University
2015/08 ~ present Professor, Department of Electrical Engineering, National Cheng Kung University

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Network Recent external collaboration on country level. Dive into details by clicking on the dots.

使用電阻式隨機存取記憶體的低功耗類神經記憶體與模型開發

Chiang, M.

17-08-01 → 18-07-31

Project: Research project

側向與垂直式環繞式閘極電晶體陣列的特性與實用性研究

Chiang, M.

16-08-01 → 17-07-31

Project: Research project

Research Output 1998 2019

707 Citations
12 h-Index
46 Conference contribution
37 Article
3 Conference article
2 Paper

An RRAM with a 2D material embedded double switching layer for neuromorphic computing

Chen, P. A., Ge, R. J., Lee, J. W., Hsu, C. H., Hsu, W. C., Akinwande, D. & Chiang, M. H., 2019 Jan 8, 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018. Institute of Electrical and Electronics Engineers Inc., 8605915. (2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

random access memory

oxygen ions

plastic properties

Plasticity

Ions

Atomristors: Memory Effect in Atomically-thin Sheets and Record RF Switches

Ge, R., Wu, X., Kim, M., Chen, P. A., Shi, J., Choi, J., Li, X., Zhang, Y., Chiang, M-H., Lee, J. C. & Akinwande, D., 2019 Jan 16, 2018 IEEE International Electron Devices Meeting, IEDM 2018. Institute of Electrical and Electronics Engineers Inc., p. 22.6.1-22.6.4 8614602. (Technical Digest - International Electron Devices Meeting, IEDM; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

switches

Switches

Data storage equipment

Monolayers

Sulfur

Insights to the scaling impact on back-gate biasing for FD SOI MOSFETs

Chang, M. Y., Wang, L. J. & Chiang, M-H., 2019 Feb 11, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 8640185. (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

SOI (semiconductors)

field effect transistors

thin bodies

inversions

scaling

Simulation-based study of high-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

Wu, Y. T., Ding, F., Connelly, D., Chiang, M. H., Chen, J. F. & Liu, T. J. K., 2019 Apr, In : IEEE Transactions on Electron Devices. 66, 4, p. 1754-1759 6 p., 8661752.

Research output: Contribution to journal › Article

Static random access storage

Oxides

Nanowires

Transistors

Electric potential

1 Citation (Scopus)

Speed Optimization of Vertically Stacked Gate-All-Around MOSFETs with Inner Spacers for Low Power and Ultra-Low Power Applications

Huang, Y. C., Chiang, M-H. & Wang, S-J., 2019 Apr 23, Proceedings of the 20th International Symposium on Quality Electronic Design, ISQED 2019. IEEE Computer Society, p. 231-234 4 p. 8697706. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2019-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Controllability

Leakage currents

Masks

Capacitance

Tuning