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Research Output 1998 2019

  • 668 Citations
  • 12 h-Index
  • 47 Conference contribution
  • 39 Article
  • 2 Conference article
  • 1 Paper
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Article
2019

Simulation-based study of high-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

Wu, Y. T., Ding, F., Connelly, D., Chiang, M-H., Chen, J-F. & Liu, T. J. K., 2019 Apr 1, In : IEEE Transactions on Electron Devices. 66, 4, p. 1754-1759 6 p., 8661752.

Research output: Contribution to journalArticle

Static random access storage
Oxides
Nanowires
Transistors
Electric potential
5 Citations (Scopus)

Thinnest Nonvolatile Memory Based on Monolayer h-BN

Wu, X., Ge, R., Chen, P. A., Chou, H., Zhang, Z., Zhang, Y., Banerjee, S., Chiang, M-H., Lee, J. C. & Akinwande, D., 2019 Apr 12, In : Advanced Materials. 31, 15, 1806790.

Research output: Contribution to journalArticle

Boron nitride
Monolayers
Data storage equipment
Metal ions
Nanoelectronics
2018
1 Citation (Scopus)

An FET with a Source Tunneling Barrier Showing Suppressed Short-Channel Effects for Low-Power Applications

Hsieh, Y. F., Chen, S. H., Chen, N. Y., Lee, W. J., Tsai, J. H., Chen, C. N., Chiang, M-H., Lu, D. & Kao, K-H., 2018 Mar 1, In : IEEE Transactions on Electron Devices. 65, 3, p. 855-859 5 p.

Research output: Contribution to journalArticle

Field effect transistors
Threshold voltage
2017
1 Citation (Scopus)

All-zigzag graphene nanoribbons for planar interconnect application

Chen, P. A., Chiang, M-H. & Hsu, W-C., 2017 Jul 21, In : Journal of Applied Physics. 122, 3, 034301.

Research output: Contribution to journalArticle

lightning
graphene
eigenvectors
Green's functions
transport properties
7 Citations (Scopus)

GAAFET Versus Pragmatic FinFET at the 5nm Si-Based CMOS Technology Node

Huang, Y. C., Chiang, M-H., Wang, S-J. & Fossum, J. G., 2017 May 1, In : IEEE Journal of the Electron Devices Society. 5, 3, p. 164-169 6 p., 7890390.

Research output: Contribution to journalArticle

Nanowires
Field effect transistors
Technology
Costs and Cost Analysis
Equipment and Supplies
3 Citations (Scopus)

Integration of Gate Recessing and In Situ Cl- Doped Al2O3 for Enhancement-Mode AlGaN/GaN MOSHEMTs Fabrication

Liu, H. Y., Lin, C. W., Hsu, W-C., Lee, C. S., Chiang, M-H., Sun, W. C., Wei, S. Y. & Yu, S. M., 2017 Jan 1, In : IEEE Electron Device Letters. 38, 1, p. 91-94 4 p., 7736038.

Research output: Contribution to journalArticle

Threshold voltage
Fabrication
Spray pyrolysis
Gate dielectrics
Electric breakdown
9 Citations (Scopus)

Simulation-Based Study of Hybrid Fin/Planar LDMOS Design for FinFET-Based System-on-Chip Technology

Wu, Y. T., Ding, F., Connelly, D., Zheng, P., Chiang, M-H., Chen, J-F. & Liu, T. J. K., 2017 Oct 1, In : IEEE Transactions on Electron Devices. 64, 10, p. 4193-4199 7 p., 8010312.

Research output: Contribution to journalArticle

Field effect transistors
Electric breakdown
Computer aided design
Semiconductor materials
Electric potential
2 Citations (Scopus)

Threshold-voltage variability analysis and modeling for junctionless double-gate transistors

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2017 Jul 1, In : Microelectronics Reliability. 74, p. 22-26 5 p.

Research output: Contribution to journalArticle

Threshold voltage
threshold voltage
Film thickness
Transistors
transistors
2016
6 Citations (Scopus)

Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2016 Mar 1, In : IEEE Transactions on Electron Devices. 63, 3, p. 903-909 7 p., 7383277.

Research output: Contribution to journalArticle

Nanowires
Transistors
Computer simulation
Electric potential
Hot Temperature
2015
1 Citation (Scopus)

An Analytical Gate-All-Around MOSFET Model for Circuit Simulation

Lin, K. C., Ding, W. W. & Chiang, M-H., 2015 Jan 1, In : Advances in Materials Science and Engineering. 2015, 320320.

Research output: Contribution to journalArticle

Computer hardware description languages
Circuit simulation
Networks (circuits)
Poisson equation
Simulators
4 Citations (Scopus)

A Predictive Compact Model of Bipolar RRAM Cells for Circuit Simulations

Chiang, M-H., Hsu, K. H., Ding, W. W. & Yang, B. R., 2015 Jul 1, In : IEEE Transactions on Electron Devices. 62, 7, p. 2176-2183 8 p., 7105894.

Research output: Contribution to journalArticle

Circuit simulation
Data storage equipment
Computer hardware description languages
Simulators
Heat transfer
10 Citations (Scopus)

Investigations of AlGaN/GaN MOS-HEMT with Al2O3 deposition by ultrasonic spray pyrolysis method

Chou, B. Y., Hsu, W-C., Liu, H. Y., Lee, C. S., Wu, Y. S., Sun, W. C., Wei, S. Y., Yu, S. M. & Chiang, M-H., 2015 Jan 1, In : Semiconductor Science and Technology. 30, 1, 015009.

Research output: Contribution to journalArticle

Spray pyrolysis
High electron mobility transistors
high electron mobility transistors
metal oxide semiconductors
pyrolysis
2014
10 Citations (Scopus)

Design of gate-all-around silicon mosfets for 6-T Sram area efficiency and yield

Liao, Y. B., Chiang, M-H., Damrongplasit, N., Hsu, W-C. & Liu, T. J. K., 2014 Jan 1, In : IEEE Transactions on Electron Devices. 61, 7, p. 2371-2377 7 p., 6823112.

Research output: Contribution to journalArticle

Silicon
Transistors
Random access storage
Nanowires
Electric potential
4 Citations (Scopus)

Growing Al2O3 by ultrasonic spray pyrolysis for Al2O3/AlGaN/GaN metal-insulator-semiconductor ultraviolet photodetectors

Liu, H. Y., Hsu, W-C., Chou, B. Y., Wang, Y. H., Sun, W. C., Wei, S. Y., Yu, S. M. & Chiang, M-H., 2014 Dec 1, In : IEEE Transactions on Electron Devices. 61, 12, p. 4062-4069 8 p., 6965486.

Research output: Contribution to journalArticle

Spray pyrolysis
Photodetectors
Ultrasonics
Metals
Semiconductor materials

Investigation of discrete dopant induced variability in silicon nanowire MOSFETs using 3D simulation

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2014 Jan 1, In : International Journal of Nanotechnology. 11, 1-4, p. 40-50 11 p.

Research output: Contribution to journalArticle

Silicon
Nanowires
nanowires
field effect transistors
Doping (additives)
18 Citations (Scopus)

Investigation of temperature-dependent characteristics of AlGaN/GaN MOS-HEMT by using hydrogen peroxide oxidation technique

Liu, H. Y., Hsu, W-C., Lee, C. S., Chou, B. Y., Liao, Y. B. & Chiang, M-H., 2014 Jan 1, In : IEEE Transactions on Electron Devices. 61, 8, p. 2760-2766 7 p., 6828723.

Research output: Contribution to journalArticle

High electron mobility transistors
Hydrogen peroxide
Hydrogen Peroxide
Metals
Oxidation
4 Citations (Scopus)

Performance optimization for the sub-22 nm fully depleted SOI nanowire transistors

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2014 Feb 1, In : Solid-State Electronics. 92, p. 57-62 6 p.

Research output: Contribution to journalArticle

SOI (semiconductors)
Nanowires
Transistors
nanowires
transistors
8 Citations (Scopus)

Stack gate technique for dopingless bulk FinFETs

Liao, Y. B., Chiang, M-H., Lai, Y. S. & Hsu, W-C., 2014 Jan 1, In : IEEE Transactions on Electron Devices. 61, 4, p. 963-968 6 p., 6755551.

Research output: Contribution to journalArticle

Doping (additives)
Substrates
Metals
Silicon
Polysilicon
16 Citations (Scopus)

TiO2-dielectric AlGaN/GaN/Si metal-oxide-semiconductor high electron mobility transistors by using nonvacuum ultrasonic spray pyrolysis deposition

Chou, B. Y., Lee, C. S., Yang, C. L., Hsu, W-C., Liu, H. Y., Chiang, M-H., Sun, W. C., Wei, S. Y. & Yu, S. M., 2014 Nov 1, In : IEEE Electron Device Letters. 35, 11, p. 1091-1093 3 p.

Research output: Contribution to journalArticle

Spray pyrolysis
High electron mobility transistors
Gates (transistor)
Ultrasonics
Metals
3 Citations (Scopus)

Variation-aware comparative study of 10-nm GAA versus FinFET 6-T SRAM performance and yield

Zheng, P., Liao, Y. B., Damrongplasit, N., Chiang, M-H. & Liu, T. J. K., 2014 Dec 1, In : IEEE Transactions on Electron Devices. 61, 12, p. 3949-3954 6 p., 6951350.

Research output: Contribution to journalArticle

Static random access storage
Transistors
Silicon
Electric potential
FinFET
2013

A pragmatic design methodology using proper isolation and doping for bulk FinFETs

Liao, Y. B., Chiang, M-H., Lai, Y. S. & Hsu, W-C., 2013 May 13, In : Solid-State Electronics. 85, p. 48-53 6 p.

Research output: Contribution to journalArticle

isolation
Doping (additives)
methodology
Oxides
Substrates
2012
7 Citations (Scopus)

Assessment of structure variation in silicon nanowire FETs and impact on SRAM

Liao, Y. B., Chiang, M-H., Kim, K. & Hsu, W-C., 2012 May 1, In : Microelectronics Journal. 43, 5, p. 300-304 5 p.

Research output: Contribution to journalArticle

Static random access storage
Silicon
Field effect transistors
Nanowires
nanowires

Characteristics of InGaP/InGaAs pseudomorphic high electron mobility transistors with triple delta-doped sheets

Chu, K. Y., Chiang, M-H., Cheng, S. Y. & Liu, W-C., 2012 Feb 1, In : Semiconductors. 46, 2, p. 203-207 5 p.

Research output: Contribution to journalArticle

High electron mobility transistors
high electron mobility transistors
Carrier concentration
Drain current
Transconductance
2 Citations (Scopus)
High electron mobility transistors
high electron mobility transistors
Microwaves
Digital devices
Microwave devices
2 Citations (Scopus)

Comprehensive study of InGaP/InGaAs/GaAs dual channel pseudomorphic high electron mobility transistors

Chu, K. Y., Cheng, S. Y., Chiang, M-H., Liu, Y. J., Huang, C. C., Chen, T. Y., Hsu, C. S., Liu, W-C., Cheng, W. Y. & Lin, B. C., 2012 Jun 1, In : Solid-State Electronics. 72, p. 22-28 7 p.

Research output: Contribution to journalArticle

High electron mobility transistors
high electron mobility transistors
Microwaves
Digital devices
Microwave devices
2011

Effect of graded triple delta-doped sheets on the performance of GaAs based dual channel pseudomorphic high electron mobility transistors

Chu, K. Y., Cheng, S. Y., Chiang, M-H., Liu, Y. J., Huang, C. C., Chen, T. Y., Hsu, C. S., Liu, W-C., Cheng, W. Y. & Lin, B. C., 2011 Oct 1, In : Superlattices and Microstructures. 50, 4, p. 289-295 7 p.

Research output: Contribution to journalArticle

High electron mobility transistors
high electron mobility transistors
Transport properties
Carrier concentration
Simulators
2010

Low power design of phase-change memory based on a comprehensive model

Chiang, M-H., Liao, Y. B., Lin, J. T., Hsu, W-C., Yu, C., Chiang, P. C., Hsu, Y. Y., Liu, W. H., Sheu, S. S., Su, K. L., Kao, M. J. & Tsai, M. J., 2010 Jul 1, In : IET Computers and Digital Techniques. 4, 4, p. 285-292 8 p., ICDTA6000004000004000285000001.

Research output: Contribution to journalArticle

Phase change memory
Electric power utilization
Hot Temperature
2008
2 Citations (Scopus)

A comprehensive parameterized model of phase-change memory cell for HSPICE circuit simulation

Chao, D. S., Lien, C., Chen, Y. K., Liao, Y. B., Chiang, M-H., Kao, M. J. & Tsai, M. J., 2008 Apr 25, In : Japanese journal of applied physics. 47, 4 PART 2, p. 2696-2700 5 p.

Research output: Contribution to journalArticle

Phase change memory
Circuit simulation
cells
simulation
programming
5 Citations (Scopus)

Optimal design of triple-gate devices for high-performance and low-power applications

Chiang, M-H., Lin, J. N., Kim, K. & Chuang, C. T., 2008 Aug 12, In : IEEE Transactions on Electron Devices. 55, 9, p. 2423-2428 6 p.

Research output: Contribution to journalArticle

Polysilicon
Metals
Doping (additives)
Networks (circuits)
Computer simulation
2007
80 Citations (Scopus)

Random dopant fluctuation in limited-width FinFET technologies

Chiang, M-H., Lin, J. N., Kim, K. & Chuang, C. T., 2007 Aug 1, In : IEEE Transactions on Electron Devices. 54, 8, p. 2055-2060 6 p.

Research output: Contribution to journalArticle

Doping (additives)
Silicon
Impurities
FinFET
Computer simulation
2006
61 Citations (Scopus)

High-density reduced-stack logic circuit techniques using independent-gate controlled double-gate devices

Chiang, M-H., Kim, K., Chuang, C. T. & Tretz, C., 2006 Sep 1, In : IEEE Transactions on Electron Devices. 53, 9, p. 2370-2377 8 p.

Research output: Contribution to journalArticle

Logic circuits
Transistors
Logic gates
Threshold voltage
Polysilicon
11 Citations (Scopus)

Improved dc and microwave performance of heterojunction bipolar transistors by full sulfur passivation

Cheng, S. Y., Fu, S. I., Chu, K. Y., Lai, P. H., Chen, L. Y., Liu, W-C. & Chiang, M-H., 2006 Mar 1, In : Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 24, 2, p. 669-674 6 p.

Research output: Contribution to journalArticle

Heterojunction bipolar transistors
bipolar transistors
Passivation
passivity
heterojunctions
9 Citations (Scopus)

Threshold voltage sensitivity to doping density in extremely scaled MOSFETs

Chiang, M-H., Lin, C. N. & Lin, G. S., 2006 Feb 1, In : Semiconductor Science and Technology. 21, 2, p. 190-193 4 p.

Research output: Contribution to journalArticle

Threshold voltage
threshold voltage
field effect transistors
Doping (additives)
mountains
2005
3 Citations (Scopus)

Comprehensive studies of InGaP/GaAs heterojunction bipolar transistors with different thickness of setback layers

Cheng, S. Y., Chen, C. Y., Chen, J. Y., Liu, W-C., Chang, W. L. & Chiang, M-H., 2005 Mar 1, In : Superlattices and Microstructures. 37, 3, p. 171-183 13 p.

Research output: Contribution to journalArticle

Bipolar transistors
Heterojunction bipolar transistors
bipolar transistors
Heterojunctions
heterojunctions
25 Citations (Scopus)

Novel high-density low-power logic circuit techniques using DG devices

Chiang, M-H., Kim, K., Tretz, C. & Chuang, C. T., 2005 Oct 1, In : IEEE Transactions on Electron Devices. 52, 10, p. 2339-2342 4 p.

Research output: Contribution to journalArticle

Logic circuits
Transistors
Networks (circuits)
Electric power utilization
2004
90 Citations (Scopus)

A process/physics-based compact model for nonclassical CMOS device and circuit design

Fossum, J. G., Ge, L., Chiang, M-H., Trivedi, V. P., Chowdhury, M. M., Mathew, L., Workman, G. O. & Nguyen, B. Y., 2004 Jun 1, In : Solid-State Electronics. 48, 6, p. 919-926 8 p.

Research output: Contribution to journalArticle

thin bodies
CMOS
field effect transistors
Physics
SOI (semiconductors)
2002
70 Citations (Scopus)

Speed superiority of scaled double-gate CMOS

Fossum, J. G., Ge, L. & Chiang, M-H., 2002 May 1, In : IEEE Transactions on Electron Devices. 49, 5, p. 808-811 4 p.

Research output: Contribution to journalArticle

Dichlorodiphenyldichloroethane
Capacitance
Physics
Networks (circuits)
Electric potential
1999
12 Citations (Scopus)

Analysis and control of hysteresis in PD/SOI CMOS

Pelella, M. M., Fossum, J. G., Chiang, M-H., Workman, G. O. & Tretz, C. R., 1999, In : Technical Digest - International Electron Devices Meeting. p. 831-834 4 p.

Research output: Contribution to journalArticle

SOI (semiconductors)
Hysteresis
CMOS
hysteresis
methodology
1998
10 Citations (Scopus)

Design issues and insights for low-voltage high-density SOI DRAM

Possum, J. G., Chiang, M-H. & Houston, T. W., 1998 Dec 1, In : IEEE Transactions on Electron Devices. 45, 5, p. 1055-1062 8 p.

Research output: Contribution to journalArticle

Dynamic random access storage
Electric potential
Data storage equipment
Circuit simulation
Physics