1-V bulk-driven CMOS analog programmable winner-takes-all circuit

Yu Cherng Hung, Bin-Da Liu, Chung Yang Tsai

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

In this paper, a 1-V bulk-driven analog winner-takes-all circuit with programmable k-winners capability is proposed. By presetting a set of binary bits, the desired k-winners-take-all or k-losers-take-all function is programmable. The proposed upward-and-downward searching greatly improves the response time. The chip has been fabricated with a 0.25-μm CMOS technology. Simulated results show that the response time of the winner-takes-all circuit is 50 μs under 5-mV identified resolution. The input range is approximately to be rail-to-rail.

Original languageEnglish
Pages (from-to)53-61
Number of pages9
JournalAnalog Integrated Circuits and Signal Processing
Volume49
Issue number1
DOIs
Publication statusPublished - 2006 Oct 1

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All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

Cite this

Hung, Yu Cherng ; Liu, Bin-Da ; Tsai, Chung Yang. / 1-V bulk-driven CMOS analog programmable winner-takes-all circuit. In: Analog Integrated Circuits and Signal Processing. 2006 ; Vol. 49, No. 1. pp. 53-61.
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1-V bulk-driven CMOS analog programmable winner-takes-all circuit. / Hung, Yu Cherng; Liu, Bin-Da; Tsai, Chung Yang.

In: Analog Integrated Circuits and Signal Processing, Vol. 49, No. 1, 01.10.2006, p. 53-61.

Research output: Contribution to journalArticle

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