1-V CMOS comparator for programmable analog rank-order extractor

Yu Cherng Hung, Bin Da Liu

Research output: Contribution to journalArticle

20 Citations (Scopus)

Abstract

A CMOS rail-to-rail comparator operating at low-voltage supply by using a conventional fabrication process is proposed. Based on the comparator, an analog rank-order extractor with κ winner-take-all capability is presented. An experimental chip was fabricated using 0.5 μm CMOS technology. Measured results at 1-V supply voltage show a comparator response time of 4 μs for 10-mV precision and that the extractor within 4 μs successfully identifies a 100-mV differential voltage among inputs to find a rank order of the input set.

Original languageEnglish
Pages (from-to)673-677
Number of pages5
JournalIEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
Volume50
Issue number5
DOIs
Publication statusPublished - 2003 May 1

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Rails
Electric potential
Fabrication

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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1-V CMOS comparator for programmable analog rank-order extractor. / Hung, Yu Cherng; Liu, Bin Da.

In: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 50, No. 5, 01.05.2003, p. 673-677.

Research output: Contribution to journalArticle

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