3D integration of vertical-stacking of MoS2and Si CMOS featuring embedded 2T1R configuration demonstrated on full wafers

C. J. Su, M. K. Huang, K. S. Lee, V. P.H. Hu, Y. F. Huang, B. C. Zheng, C. H. Yao, N. C. Lin, K. H. Kao, T. C. Hong, P. J. Sung, C. T. Wu, T. Y. Yu, K. L. Lin, Y. C. Tseng, C. L. Lin, Y. J. Lee, T. S. Chao, J. Y. Li, W. F. WuJ. M. Shieh, Y. H. Wang, W. K. Yeh

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