50 nm vertical surround gate MOSFET with S-factor of 75mV/dec

R. Li, Y. Zhang, Y. Lu, Sung Choi Daniel Sung Choi, M. Luo, K. L. Wang

Research output: Contribution to conferencePaperpeer-review

4 Citations (Scopus)


Fully depleted vertical metal oxide semiconductor field effect transistors (MOSFET) were fabricated, characterized. A self-aligned process was used to fabricate the structure on silicon walls. The vertical MOSFET exposed by focus ion microbeam milling was analyzed by scanning electron microscopy.

Original languageEnglish
Number of pages2
Publication statusPublished - 2001
EventDevice Research Conference (DRC) - Notre Dame, IN, United States
Duration: 2001 Jun 252001 Jun 27


ConferenceDevice Research Conference (DRC)
Country/TerritoryUnited States
CityNotre Dame, IN

All Science Journal Classification (ASJC) codes

  • Engineering(all)


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