6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs

Yi Bo Liao; Meng Hsueh Chiang; Nattapol Damrongplasit; Tsu Jae King Liu; Wei Chou Hsu

doi:10.1109/VLSI-TSA.2013.6545631

6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs

Yi Bo Liao, Meng Hsueh Chiang, Nattapol Damrongplasit, Tsu Jae King Liu, Wei Chou Hsu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

9 Citations (Scopus)

Abstract

6T-SRAM cell design with gate-all-around (GAA) silicon nanowire (NW) MOSFETs is investigated via three-dimensional TCAD simulations and compact analytical modeling. A rectangular NW channel design allows the transistor width to be adjusted with reduced impact on short-channel effects. This in turn provides a means for tuning the cell ratios to optimize the tradeoff between static noise margin and writeability with optimal cell layout area efficiency.

Original language	English
Title of host publication	2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
DOIs	https://doi.org/10.1109/VLSI-TSA.2013.6545631
Publication status	Published - 2013
Event	2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 - Hsinchu, Taiwan Duration: 2013 Apr 22 → 2013 Apr 24

Publication series

Name	2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013

Other

Other	2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
Country/Territory	Taiwan
City	Hsinchu
Period	13-04-22 → 13-04-24

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/VLSI-TSA.2013.6545631

Cite this

Liao, Y. B., Chiang, M. H., Damrongplasit, N., Liu, T. J. K., & Hsu, W. C. (2013). 6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs. In 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 [6545631] (2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013). https://doi.org/10.1109/VLSI-TSA.2013.6545631

@inproceedings{5f42d551d9f6456cba119a69fac550e2,

title = "6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs",

abstract = "6T-SRAM cell design with gate-all-around (GAA) silicon nanowire (NW) MOSFETs is investigated via three-dimensional TCAD simulations and compact analytical modeling. A rectangular NW channel design allows the transistor width to be adjusted with reduced impact on short-channel effects. This in turn provides a means for tuning the cell ratios to optimize the tradeoff between static noise margin and writeability with optimal cell layout area efficiency.",

author = "Liao, {Yi Bo} and Chiang, {Meng Hsueh} and Nattapol Damrongplasit and Liu, {Tsu Jae King} and Hsu, {Wei Chou}",

year = "2013",

doi = "10.1109/VLSI-TSA.2013.6545631",

language = "English",

isbn = "9781467330817",

series = "2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013",

booktitle = "2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013",

note = "2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 ; Conference date: 22-04-2013 Through 24-04-2013",

}

Liao, YB, Chiang, MH, Damrongplasit, N, Liu, TJK & Hsu, WC 2013, 6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs. in 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013., 6545631, 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013, 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013, Hsinchu, Taiwan, 13-04-22. https://doi.org/10.1109/VLSI-TSA.2013.6545631

6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs. / Liao, Yi Bo; Chiang, Meng Hsueh; Damrongplasit, Nattapol et al.
2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013. 2013. 6545631 (2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - 6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs

AU - Liao, Yi Bo

AU - Chiang, Meng Hsueh

AU - Damrongplasit, Nattapol

AU - Liu, Tsu Jae King

AU - Hsu, Wei Chou

PY - 2013

Y1 - 2013

N2 - 6T-SRAM cell design with gate-all-around (GAA) silicon nanowire (NW) MOSFETs is investigated via three-dimensional TCAD simulations and compact analytical modeling. A rectangular NW channel design allows the transistor width to be adjusted with reduced impact on short-channel effects. This in turn provides a means for tuning the cell ratios to optimize the tradeoff between static noise margin and writeability with optimal cell layout area efficiency.

AB - 6T-SRAM cell design with gate-all-around (GAA) silicon nanowire (NW) MOSFETs is investigated via three-dimensional TCAD simulations and compact analytical modeling. A rectangular NW channel design allows the transistor width to be adjusted with reduced impact on short-channel effects. This in turn provides a means for tuning the cell ratios to optimize the tradeoff between static noise margin and writeability with optimal cell layout area efficiency.

UR - http://www.scopus.com/inward/record.url?scp=84881186940&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84881186940&partnerID=8YFLogxK

U2 - 10.1109/VLSI-TSA.2013.6545631

DO - 10.1109/VLSI-TSA.2013.6545631

M3 - Conference contribution

AN - SCOPUS:84881186940

SN - 9781467330817

T3 - 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013

BT - 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013

T2 - 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013

Y2 - 22 April 2013 through 24 April 2013

ER -

6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs

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