TY - JOUR
T1 - 60-GHz CMOS Doppler Radar Sensor with Integrated V-Band Power Detector for Clutter Monitoring and Automatic Clutter-Cancellation in Noncontact Vital-Signs Sensing
AU - Chou, Chien Chang
AU - Lai, Wen Chian
AU - Hsiao, Yi Kai
AU - Chuang, Huey Ru
N1 - Funding Information:
Manuscript received July 29, 2017; revised September 30, 2017; accepted November 1, 2017. Date of publication December 11, 2017; date of current version March 5, 2018. This work was supported by the Ministry of Science and Technology of Taiwan under Grant MOST 105-2221-E-006-244. This paper is an expanded version from the 2017 IEEE MTT-S International Microwave Symposium Conference, Honolulu, HI, USA, June 4–9, 2017. (Corresponding author: Huey-Ru Chuang.) The authors are with the Department of Electrical Engineering, Institute of Computer and Communication Engineering, National Cheng Kung University, Tainan 70101, Taiwan (e-mail: [email protected]).
Publisher Copyright:
© 1963-2012 IEEE.
PY - 2018/3
Y1 - 2018/3
N2 - This paper presents the design of a V-band logarithmic power detector (PD) and the integration with a 60-GHz CMOS vital-signs Doppler radar sensor to be incorporated with a microprocessor control unit (MCU) for fast automatic clutter cancellation. The PD adopts the successive detection logarithmic amplifier (SDLA) topology and achieves a high dynamic range by replacing the limited amplifiers with millimeter-wave (MMW) linear amplifiers. From the measurement results, the PD exhibits a dynamic range and logarithmic errors higher than 35 dB and within ±2 dB from 50 to 62 GHz. The whole integrated radar sensor chip is fabricated by a 90-nm CMOS process with a chip size of 2 mm ×2.34 mm and a dc power consuming of 243 mW. The radar chip and a 60-GHz 17-dBi patch-Array antenna are integrated by bondwire interconnection on a compact single carrier board for experimental test. By incorporating the MCU to the radar chip board, the fast automatic clutter canceling can achieve more than 25-dB clutter cancellation. Moreover, it shows a successful vital-signs detection for a distance more than 1.2 m.
AB - This paper presents the design of a V-band logarithmic power detector (PD) and the integration with a 60-GHz CMOS vital-signs Doppler radar sensor to be incorporated with a microprocessor control unit (MCU) for fast automatic clutter cancellation. The PD adopts the successive detection logarithmic amplifier (SDLA) topology and achieves a high dynamic range by replacing the limited amplifiers with millimeter-wave (MMW) linear amplifiers. From the measurement results, the PD exhibits a dynamic range and logarithmic errors higher than 35 dB and within ±2 dB from 50 to 62 GHz. The whole integrated radar sensor chip is fabricated by a 90-nm CMOS process with a chip size of 2 mm ×2.34 mm and a dc power consuming of 243 mW. The radar chip and a 60-GHz 17-dBi patch-Array antenna are integrated by bondwire interconnection on a compact single carrier board for experimental test. By incorporating the MCU to the radar chip board, the fast automatic clutter canceling can achieve more than 25-dB clutter cancellation. Moreover, it shows a successful vital-signs detection for a distance more than 1.2 m.
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U2 - 10.1109/TMTT.2017.2777467
DO - 10.1109/TMTT.2017.2777467
M3 - Article
AN - SCOPUS:85038849741
SN - 0018-9480
VL - 66
SP - 1635
EP - 1643
JO - IEEE Transactions on Microwave Theory and Techniques
JF - IEEE Transactions on Microwave Theory and Techniques
IS - 3
ER -