A 0.35-1 V 0.2-3 GS/s 4-bit low-power flash ADC for a solar-powered wireless module

Ying Z. Lin, Yu Chang Lien, Soon-Jyh Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper reports a 4-bit flash ADC with a supply range from 0.35 to 1 V. The corresponding sampling rates are 0.2 to 3 GS/s. This low-voltage low-power ADC is a feasible building block for a solar-powered wireless module. Passive subtraction by resistor ladders replaces active subtraction by 4-input preamplifiers since the linearity of ladders is independent of supply voltage. Passive subtraction and low-threshold devices enable low-supply operation. At 1.2 GS/s, the ADC consumes 1.93 mW from a 0.6-V supply. The ENOB is 3.60 bit and ERBW is 550 MHz, resulting in an FOM of 145 fJ/conversion-step.

Original languageEnglish
Title of host publicationProceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010
Pages299-302
Number of pages4
DOIs
Publication statusPublished - 2010 Nov 8
Event2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010 - Hsin Chu, Taiwan
Duration: 2010 Apr 262010 Apr 29

Publication series

NameProceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010

Other

Other2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010
CountryTaiwan
CityHsin Chu
Period10-04-2610-04-29

Fingerprint

Ladders
Electric potential
Resistors
Sampling

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Lin, Y. Z., Lien, Y. C., & Chang, S-J. (2010). A 0.35-1 V 0.2-3 GS/s 4-bit low-power flash ADC for a solar-powered wireless module. In Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010 (pp. 299-302). [5496748] (Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010). https://doi.org/10.1109/VDAT.2010.5496748
Lin, Ying Z. ; Lien, Yu Chang ; Chang, Soon-Jyh. / A 0.35-1 V 0.2-3 GS/s 4-bit low-power flash ADC for a solar-powered wireless module. Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010. 2010. pp. 299-302 (Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010).
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abstract = "This paper reports a 4-bit flash ADC with a supply range from 0.35 to 1 V. The corresponding sampling rates are 0.2 to 3 GS/s. This low-voltage low-power ADC is a feasible building block for a solar-powered wireless module. Passive subtraction by resistor ladders replaces active subtraction by 4-input preamplifiers since the linearity of ladders is independent of supply voltage. Passive subtraction and low-threshold devices enable low-supply operation. At 1.2 GS/s, the ADC consumes 1.93 mW from a 0.6-V supply. The ENOB is 3.60 bit and ERBW is 550 MHz, resulting in an FOM of 145 fJ/conversion-step.",
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Lin, YZ, Lien, YC & Chang, S-J 2010, A 0.35-1 V 0.2-3 GS/s 4-bit low-power flash ADC for a solar-powered wireless module. in Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010., 5496748, Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010, pp. 299-302, 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010, Hsin Chu, Taiwan, 10-04-26. https://doi.org/10.1109/VDAT.2010.5496748

A 0.35-1 V 0.2-3 GS/s 4-bit low-power flash ADC for a solar-powered wireless module. / Lin, Ying Z.; Lien, Yu Chang; Chang, Soon-Jyh.

Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010. 2010. p. 299-302 5496748 (Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Lin YZ, Lien YC, Chang S-J. A 0.35-1 V 0.2-3 GS/s 4-bit low-power flash ADC for a solar-powered wireless module. In Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010. 2010. p. 299-302. 5496748. (Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010). https://doi.org/10.1109/VDAT.2010.5496748