A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction

Shih Hsiung Chien, Tai Haur Kuo, Hung Yi Huang, Hong Bin Wang, Yi Zhi Qiu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

For Class-D audio amplifiers, the closed-loop topology formed by a loop filter, a pulse-width-modulation (PWM) modulator and a switching power stage is commonly adopted since it effectively suppresses the power-stage nonlinearity to improve total harmonic distortion plus noise (THD+N). However, unless a higher switching frequency (mathrm{f} {mathrm{SW}}) or a higher-order loop filter is adopted [2]-[4], the PWM-residual-aliasing distortion [1] introduced by the feedback loop limits the minimum THD+N. This leads to a tradeoff between THD+N and quiescent current (mathrm{I} {mathrm{Q}}). Moreover, since typical audio signals have a high crest factor of 10 to 20dB [1], the mathrm{I} {mathrm{Q}} of audio amplifiers in battery-powered applications should be minimized to extend the battery usage time. To achieve both low THD+N and low mathrm{I} {mathrm{Q}}, the PWM-residual-aliasing reduction methods presented in [1] and [5] reduce the PWM-residual-aliasing distortion for 2nd-order Class-D amplifiers without increasing the mathrm{f} {mathrm{SW}}, thereby preventing an increase in the switching power loss. However, the replicated loop filter in [5] requires additional static current; while in [1], the inherent phase-shift delay between the loop filter output and the input signal limits the effectiveness of PWM residual cancellation, leading to degraded THD+N.

Original languageEnglish
Title of host publication2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages352-354
Number of pages3
ISBN (Electronic)9781728132044
DOIs
Publication statusPublished - 2020 Feb
Event2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States
Duration: 2020 Feb 162020 Feb 20

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume2020-February
ISSN (Print)0193-6530

Conference

Conference2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
CountryUnited States
CitySan Francisco
Period20-02-1620-02-20

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All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Chien, S. H., Kuo, T. H., Huang, H. Y., Wang, H. B., & Qiu, Y. Z. (2020). A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction. In 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 (pp. 352-354). [9062932] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2020-February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC19947.2020.9062932