A 0.82mW 14b 130MS/S Pipelined-SAR ADC With a Distributed Averaging Correlated Level Shifting (DACLS) Ringamp and Bypass-Window Backend

Jia Ching Wang, Tai Haur Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

To fulfill upcoming communication specifications, it has become popular recently to employ pipelined-SAR architectures, incorporating residue amplifiers (RA) to achieve high resolution, wide bandwidth, and low-power ADCs [1, 2]. Hence, the RA design plays an important role in the ADCs. In this work, a distributed averaging correlated level shifting (DACLS) ringamp is proposed to not only enhance the resolution by reducing the RA gain error, but also extend the bandwidth by minimizing the RA output load compared to prior arts [2 - 4]. In addition, a customized bypass-window backend for the last pipeline stage is applied for power reduction.

Original languageEnglish
Title of host publication2022 IEEE International Solid-State Circuits Conference, ISSCC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages162-164
Number of pages3
ISBN (Electronic)9781665428002
DOIs
Publication statusPublished - 2022
Event2022 IEEE International Solid-State Circuits Conference, ISSCC 2022 - San Francisco, United States
Duration: 2022 Feb 202022 Feb 26

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume2022-February
ISSN (Print)0193-6530

Conference

Conference2022 IEEE International Solid-State Circuits Conference, ISSCC 2022
Country/TerritoryUnited States
CitySan Francisco
Period22-02-2022-02-26

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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