A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS

Ying Zu Lin; Soon-Jyh Chang; Ya Ting Shyu; Guan Ying Huang; Chun Cheng Liu

doi:10.1109/ASSCC.2011.6123606

A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS

Ying Zu Lin, Soon-Jyh Chang, Ya Ting Shyu, Guan Ying Huang, Chun Cheng Liu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

15 Citations (Scopus)

Abstract

This paper presents a new subrange analog-to-digital converter (ADC): a binary-search coarse ADC + a SAR fine ADC. The binary-search ADC improves conversion speed and gives coarse capacitors longer settling time. This ADC uses an RC hybrid DAC to reduce the unit capacitor count by 2. The rotation function of coarse capacitors enhances capacitor array linearity. The prototype in 90-nm CMOS only occupies an active area of 0.06 mm ². From a 0.9-V supply, the power consumption is 0.32 and 0.58 mW at 10 and 25 MS/s, respectively. At 10 MS/s, the peak ENOB is 10.2 bit. At 25 MS/s, the peak ENOB is 9.9 bit and FOM is 29 fJ/conversion-step.

Original language	English
Title of host publication	2011 Proceedings of Technical Papers
Subtitle of host publication	IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011
Pages	69-72
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2011.6123606
Publication status	Published - 2011 Dec 1
Event	7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 - Jeju, Korea, Republic of Duration: 2011 Nov 14 → 2011 Nov 16

Publication series

Name	2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011

Other

Other	7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011
Country/Territory	Korea, Republic of
City	Jeju
Period	11-11-14 → 11-11-16

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ASSCC.2011.6123606

Cite this

Lin, Y. Z., Chang, S.-J., Shyu, Y. T., Huang, G. Y., & Liu, C. C. (2011). A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS. In 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 (pp. 69-72). Article 6123606 (2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011). https://doi.org/10.1109/ASSCC.2011.6123606

@inproceedings{8a503c9b04b34efe91b41df4fb3c5371,

title = "A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS",

abstract = "This paper presents a new subrange analog-to-digital converter (ADC): a binary-search coarse ADC + a SAR fine ADC. The binary-search ADC improves conversion speed and gives coarse capacitors longer settling time. This ADC uses an RC hybrid DAC to reduce the unit capacitor count by 2. The rotation function of coarse capacitors enhances capacitor array linearity. The prototype in 90-nm CMOS only occupies an active area of 0.06 mm 2. From a 0.9-V supply, the power consumption is 0.32 and 0.58 mW at 10 and 25 MS/s, respectively. At 10 MS/s, the peak ENOB is 10.2 bit. At 25 MS/s, the peak ENOB is 9.9 bit and FOM is 29 fJ/conversion-step.",

author = "Lin, {Ying Zu} and Soon-Jyh Chang and Shyu, {Ya Ting} and Huang, {Guan Ying} and Liu, {Chun Cheng}",

year = "2011",

month = dec,

day = "1",

doi = "10.1109/ASSCC.2011.6123606",

language = "English",

isbn = "9781467303989",

series = "2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011",

pages = "69--72",

booktitle = "2011 Proceedings of Technical Papers",

note = "7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 ; Conference date: 14-11-2011 Through 16-11-2011",

}

Lin, YZ, Chang, S-J, Shyu, YT, Huang, GY & Liu, CC 2011, A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS. in 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011., 6123606, 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011, pp. 69-72, 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011, Jeju, Korea, Republic of, 11-11-14. https://doi.org/10.1109/ASSCC.2011.6123606

A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS. / Lin, Ying Zu; Chang, Soon-Jyh; Shyu, Ya Ting et al.
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. 2011. p. 69-72 6123606 (2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS

AU - Lin, Ying Zu

AU - Chang, Soon-Jyh

AU - Shyu, Ya Ting

AU - Huang, Guan Ying

AU - Liu, Chun Cheng

PY - 2011/12/1

Y1 - 2011/12/1

N2 - This paper presents a new subrange analog-to-digital converter (ADC): a binary-search coarse ADC + a SAR fine ADC. The binary-search ADC improves conversion speed and gives coarse capacitors longer settling time. This ADC uses an RC hybrid DAC to reduce the unit capacitor count by 2. The rotation function of coarse capacitors enhances capacitor array linearity. The prototype in 90-nm CMOS only occupies an active area of 0.06 mm 2. From a 0.9-V supply, the power consumption is 0.32 and 0.58 mW at 10 and 25 MS/s, respectively. At 10 MS/s, the peak ENOB is 10.2 bit. At 25 MS/s, the peak ENOB is 9.9 bit and FOM is 29 fJ/conversion-step.

AB - This paper presents a new subrange analog-to-digital converter (ADC): a binary-search coarse ADC + a SAR fine ADC. The binary-search ADC improves conversion speed and gives coarse capacitors longer settling time. This ADC uses an RC hybrid DAC to reduce the unit capacitor count by 2. The rotation function of coarse capacitors enhances capacitor array linearity. The prototype in 90-nm CMOS only occupies an active area of 0.06 mm 2. From a 0.9-V supply, the power consumption is 0.32 and 0.58 mW at 10 and 25 MS/s, respectively. At 10 MS/s, the peak ENOB is 10.2 bit. At 25 MS/s, the peak ENOB is 9.9 bit and FOM is 29 fJ/conversion-step.

UR - http://www.scopus.com/inward/record.url?scp=84863064232&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84863064232&partnerID=8YFLogxK

U2 - 10.1109/ASSCC.2011.6123606

DO - 10.1109/ASSCC.2011.6123606

M3 - Conference contribution

AN - SCOPUS:84863064232

SN - 9781467303989

T3 - 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011

SP - 69

EP - 72

BT - 2011 Proceedings of Technical Papers

T2 - 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011

Y2 - 14 November 2011 through 16 November 2011

ER -

A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS

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