A 0.98 pJ/Cycle 3.7 ppm Long-Term Stability Frequency-Locked Oscillator with Switched-Capacitor and Switched-Resistor Techniques

Yun Sheng Hsieh, Bo Sheng Li, Kuang Wei Cheng

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work presents an energy-efficient on-chip resistive frequency-locked oscillator (RFLO) for achieving superb temperature and frequency stabilities. The resistive frequency-locked oscillator outperforms the power consumption and the temperature coefficient (TC) compared to the conventional relaxation oscillator. Frequency dividers are utilized in the feedback loop to reduce the reference current and clock power consumption. Moreover, switched-capacitor and switched-resistor techniques are both exploited to accomplish low area and low power consumption. This work was fabricated in TSMC 0.180μm process. The prototype operates at 200 kHz and achieves a 23.5 ppm/°C of TC across the temperature range from -40°C to 90°C and a line sensitivity of 0.44 %/V. Consuming 196 nW at 1 V supply voltage, it can reach a 0.98 pJ/cycle of energy efficiency.

Original languageEnglish
Title of host publicationISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665451093
DOIs
Publication statusPublished - 2023
Event56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 - Monterey, United States
Duration: 2023 May 212023 May 25

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2023-May
ISSN (Print)0271-4310

Conference

Conference56th IEEE International Symposium on Circuits and Systems, ISCAS 2023
Country/TerritoryUnited States
CityMonterey
Period23-05-2123-05-25

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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