A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems

Shuenn Yuh Lee, Chih Jen Cheng, Cheng Pin Wang, Shyh Chyang Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

27 Citations (Scopus)

Abstract

In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.

Original languageEnglish
Title of host publication2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages649-652
Number of pages4
DOIs
Publication statusPublished - 2009 Oct 26
Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
Duration: 2009 May 242009 May 27

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Country/TerritoryTaiwan
CityTaipei
Period09-05-2409-05-27

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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