TY - GEN
T1 - A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems
AU - Lee, Shuenn Yuh
AU - Cheng, Chih Jen
AU - Wang, Cheng Pin
AU - Lee, Shyh Chyang
PY - 2009/10/26
Y1 - 2009/10/26
N2 - In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.
AB - In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.
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U2 - 10.1109/ISCAS.2009.5117832
DO - 10.1109/ISCAS.2009.5117832
M3 - Conference contribution
AN - SCOPUS:70350173002
SN - 9781424438280
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 649
EP - 652
BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Y2 - 24 May 2009 through 27 May 2009
ER -