A 1-V wideband CMOS phase and power splitter (PPS) with an RLC network load and frequency compensation capacitor is proposed. Adopting the RLC network load and the frequency compensation capacitor, the gain and phase imbalances of the output can be improved and the wideband response can be achieved, respectively. Moreover, this architecture can not only offer high transfer power gain, but also adopts the tuning current source to overcome the power imbalance caused by process variation. An example with a differential phase condition (180°) has been designed and fabricated. Based on our measured results, in the frequency range from 3.5 to 6 GHz, the phase error is less than 7° and the power imbalance is less than 1.4 dB. For wireless local area network 802.11a applications in the frequency range from 5.15 to 5.35 GHz, the phase error is less than 0.6°, and the power imbalances are less than 0.27 dB, respectively. In addition, the transfer power gain is 9.66 dB under the power consumption of 15 mW and 1-V supply voltage. This architecture is different from the passive PPS circuit, and it has the advantages of no conversion loss and a small chip area with 0.8 mm × 0.7 mm. Compared with the conventional active PPSs, such as using the GaAs and BiCMOS process, this architecture implemented by the TSMC 0.18-μm CMOS process is competitive in cost and possesses the characteristics of low voltage and low power, and it is more easily integrated and suitable for system-on-a-chip applications.
|Number of pages||7|
|Journal||IEEE Transactions on Microwave Theory and Techniques|
|Publication status||Published - 2007 Aug|
All Science Journal Classification (ASJC) codes
- Condensed Matter Physics
- Electrical and Electronic Engineering