TY - JOUR
T1 - A 10-GS/s NRZ/Mixing DAC with Switching-Glitch Compensation Achieving SFDR >64/50 dBc over the First/Second Nyquist Zone
AU - Huang, Hung Yi
AU - Chen, Xin Yu
AU - Kuo, Tai Haur
N1 - Funding Information:
Manuscript received December 18, 2020; revised March 11, 2021 and April 16, 2021; accepted May 2, 2021. Date of publication May 21, 2021; date of current version September 24, 2021. This article was approved by Associate Editor Hui Pan. This work was supported by the Ministry of Science and Technology (MOST) of Taiwan. (Corresponding author: Tai-Haur Kuo.) The authors are with the Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan 70101, Taiwan (e-mail: [email protected]).
Publisher Copyright:
© 1966-2012 IEEE.
PY - 2021/10
Y1 - 2021/10
N2 - This article presents a high-linearity wide-bandwidth current-steering digital-to-analog converter (DAC). To overcome the code-dependent current-switching glitch effect, which seriously degrades the DAC linearity, a switching-glitch compensation (SGC) technique, which is realized with glitch duplicators, is proposed to generate a complementary amount of switching glitch at the DAC output. Hence, the amount of switching glitch at the DAC output becomes code-independent, thus improving the linearity of the DAC output. In addition, a decorrelator is proposed to randomize the mismatch effect of the glitch duplicators, thus eliminating the mismatch-induced spur at the DAC output spectrum. A 14-bit 10-GS/s non-return-to-zero (NRZ)/Mixing DAC with SGC is realized in 28-nm CMOS. Measurement results show that the spurious free-dynamic range (SFDR) is improved up to around 20 dB by the SGC. Therefore, this DAC with SGC achieves an SFDR >64 dBc over the entire first Nyquist zone and >50 dBc over the entire second Nyquist zone. Compared to prior state-of-the-art CMOS DACs with an output frequency (fout) ≥3.4 GHz, this DAC with SGC achieves a 12.5-dB better SFDR with fout near 10 GHz and a 1.4x higher fout with an SFDR larger than 50 dBc.
AB - This article presents a high-linearity wide-bandwidth current-steering digital-to-analog converter (DAC). To overcome the code-dependent current-switching glitch effect, which seriously degrades the DAC linearity, a switching-glitch compensation (SGC) technique, which is realized with glitch duplicators, is proposed to generate a complementary amount of switching glitch at the DAC output. Hence, the amount of switching glitch at the DAC output becomes code-independent, thus improving the linearity of the DAC output. In addition, a decorrelator is proposed to randomize the mismatch effect of the glitch duplicators, thus eliminating the mismatch-induced spur at the DAC output spectrum. A 14-bit 10-GS/s non-return-to-zero (NRZ)/Mixing DAC with SGC is realized in 28-nm CMOS. Measurement results show that the spurious free-dynamic range (SFDR) is improved up to around 20 dB by the SGC. Therefore, this DAC with SGC achieves an SFDR >64 dBc over the entire first Nyquist zone and >50 dBc over the entire second Nyquist zone. Compared to prior state-of-the-art CMOS DACs with an output frequency (fout) ≥3.4 GHz, this DAC with SGC achieves a 12.5-dB better SFDR with fout near 10 GHz and a 1.4x higher fout with an SFDR larger than 50 dBc.
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U2 - 10.1109/JSSC.2021.3079111
DO - 10.1109/JSSC.2021.3079111
M3 - Article
AN - SCOPUS:85107205803
SN - 0018-9200
VL - 56
SP - 3145
EP - 3156
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 10
ER -