A 10-GS/s NRZ/Mixing DAC with Switching-Glitch Compensation Achieving SFDR >64/50 dBc over the First/Second Nyquist Zone

Hung Yi Huang, Xin Yu Chen, Tai Haur Kuo

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

This article presents a high-linearity wide-bandwidth current-steering digital-to-analog converter (DAC). To overcome the code-dependent current-switching glitch effect, which seriously degrades the DAC linearity, a switching-glitch compensation (SGC) technique, which is realized with glitch duplicators, is proposed to generate a complementary amount of switching glitch at the DAC output. Hence, the amount of switching glitch at the DAC output becomes code-independent, thus improving the linearity of the DAC output. In addition, a decorrelator is proposed to randomize the mismatch effect of the glitch duplicators, thus eliminating the mismatch-induced spur at the DAC output spectrum. A 14-bit 10-GS/s non-return-to-zero (NRZ)/Mixing DAC with SGC is realized in 28-nm CMOS. Measurement results show that the spurious free-dynamic range (SFDR) is improved up to around 20 dB by the SGC. Therefore, this DAC with SGC achieves an SFDR >64 dBc over the entire first Nyquist zone and >50 dBc over the entire second Nyquist zone. Compared to prior state-of-the-art CMOS DACs with an output frequency (fout) ≥3.4 GHz, this DAC with SGC achieves a 12.5-dB better SFDR with fout near 10 GHz and a 1.4x higher fout with an SFDR larger than 50 dBc.

Original languageEnglish
Pages (from-to)3145-3156
Number of pages12
JournalIEEE Journal of Solid-State Circuits
Volume56
Issue number10
DOIs
Publication statusPublished - 2021 Oct

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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