A 10b 100kS/s SAR ADC with charge recycling switching method

Kai Hsiang Chiang, Soon Jyh Chang, Guan Ying Huang, Ying Zu Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper presents a low-voltage and energy-efficient 10b SAR ADC which manipulates charge recycling switching method for saving the switching energy. In additional, a window-based reconfigurable comparator is used to achieve fast comparison and small power dissipation. The proposed 10b SAR ADC operates at 100kS/s with 0.4V supply voltage in 90nm CMOS. The measurement results show that the prototype ADC achieve 55.37dB SNDR at Nyquist rate with only 107nW. The Figure-of-Merit (FoM) is 2.23fJ/conv.-step.

Original languageEnglish
Title of host publication2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages329-332
Number of pages4
ISBN (Electronic)9781479940905
DOIs
Publication statusPublished - 2015 Jan 13
Event2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 - Kaohsiung, Taiwan
Duration: 2014 Nov 102014 Nov 12

Publication series

Name2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers

Conference

Conference2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
CountryTaiwan
CityKaohsiung
Period14-11-1014-11-12

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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