@article{adcb97a71ee24f65bc22e0c52e491bd4,
title = "A 1.0 fJ energy/bit single-ended 1 kb 6T SRAM implemented using 40 nm CMOS process",
abstract = "An ultra-low-energy SRAM composed of single-ended cells is demonstrated on silicon in this investigation. More specifically, the supply voltages of cells are gated by wordline (WL) enable, and the voltage mode select (VMS) signals select one of the corresponding supply voltages. A lower voltage is selected to maintain stored bit state when cells are not accessed, lowering the standby power. And when selecting a cell (i.e. WL is enabled) to perform the read or write (R/W) operations, the normal supply voltage is used. A 1-kb SRAM prototype based on the single-ended cells with built-in self-test (BIST) and power-delay production (PDP) reduction circuits was realised on silicon using 40-nm CMOS technology. Theoretical derivations and simulations of all-PVT-corner variations are also disclosed to justify low energy performance. Physical measurements of six prototypes on silicon shows that the energy per bit is 1.0 fJ at the 10 MHz system clock.",
author = "Wang, {Chua Chin} and Sangalang, {Ralph Gerard B.} and Tseng, {I. Ting} and Chiu, {Yi Jen} and Lin, {Yu Cheng} and Jose, {Oliver Lexter July A.}",
note = "Funding Information: The National Science and Technology Council of Taiwan funded this study in part via grants MOST109-2218-E-110-007, 108-2218-E-110-011, 108-2218-E-110-002, 107-2218-E-110-002, and 110-2221-E-110-063-MY2. The authors would like to express their profound appreciation to TSRI (Taiwan Semiconductor Research Institute) in NARL (National Applied Research Laboratories), Taiwan, for providing EDA tool support, fabrication service, and measurement setup. Funding Information: The National Science and Technology Council of Taiwan funded this study in part via grants MOST109‐2218‐E‐110‐007, 108‐2218‐E‐110‐011, 108‐2218‐E‐110‐002, 107‐2218‐E‐110‐002, and 110‐2221‐E‐110‐063‐MY2. The authors would like to express their profound appreciation to TSRI (Taiwan Semiconductor Research Institute) in NARL (National Applied Research Laboratories), Taiwan, for providing EDA tool support, fabrication service, and measurement setup. Publisher Copyright: {\textcopyright} 2023 The Authors. IET Circuits, Devices & Systems published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology.",
year = "2023",
month = mar,
doi = "10.1049/cds2.12141",
language = "English",
volume = "17",
pages = "75--87",
journal = "IET Circuits, Devices and Systems",
issn = "1751-858X",
publisher = "Institution of Engineering and Technology",
number = "2",
}