A 177mW 10GS/s NRZ DAC with Switching-Glitch Compensation Achieving > 64dBc SFDR and < -77dBc IM3

Hung Yi Huang, Xin Yu Chen, Tai Haur Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work presents a 14-bit 10GS/s NRZ DAC in 28nm CMOS. Using the proposed switching-glitch compensation to reduce both the switching-glitch effect and code-dependent supply bouncing, this work achieves > 64dBc SFDR and < -77 dBc IM3 over the entire Nyquist band at 10GS/s. Compared with other state-of-the-art CMOS Nyquist NRZ DACs with resolution ≥ 10bits and fs ≥ 6GHz, this work has the smallest area of 0.1mm2, the lowest power consumption of 177mW, and the best FoM performance.

Original languageEnglish
Title of host publication2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728199429
DOIs
Publication statusPublished - 2020 Jun
Event2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States
Duration: 2020 Jun 162020 Jun 19

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2020-June

Conference

Conference2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
CountryUnited States
CityHonolulu
Period20-06-1620-06-19

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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    Huang, H. Y., Chen, X. Y., & Kuo, T. H. (2020). A 177mW 10GS/s NRZ DAC with Switching-Glitch Compensation Achieving > 64dBc SFDR and < -77dBc IM3. In 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings [9162931] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSICircuits18222.2020.9162931