TY - GEN
T1 - A 1V 11fJ/Conversion-step 10bit 10MS/s asynchronous SAR ADC in 0.18μm CMOS
AU - Liu, Chun Cheng
AU - Chang, Soon-Jyh
AU - Huang, Guan Ying
AU - Lin, Ying Zu
AU - Huang, Chung-Ming
PY - 2010/10/22
Y1 - 2010/10/22
N2 - This paper presents a 10-bit SAR ADC using a variable window function to reduce the unnecessary switching in DAC network. At 10-MS/s and 1-V supply, the ADC consumes only 98 μW and achieves an SNDR of 60.97 dB, resulting in an FOM of 11 fJ/Conversion-step. The prototype is fabricated in a 0.18μm CMOS technology.
AB - This paper presents a 10-bit SAR ADC using a variable window function to reduce the unnecessary switching in DAC network. At 10-MS/s and 1-V supply, the ADC consumes only 98 μW and achieves an SNDR of 60.97 dB, resulting in an FOM of 11 fJ/Conversion-step. The prototype is fabricated in a 0.18μm CMOS technology.
UR - http://www.scopus.com/inward/record.url?scp=77957982668&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77957982668&partnerID=8YFLogxK
U2 - 10.1109/VLSIC.2010.5560283
DO - 10.1109/VLSIC.2010.5560283
M3 - Conference contribution
AN - SCOPUS:77957982668
SN - 9781424476367
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 241
EP - 242
BT - 2010 Symposium on VLSI Circuits, VLSIC 2010
T2 - 2010 24th Symposium on VLSI Circuits, VLSIC 2010
Y2 - 16 June 2010 through 18 June 2010
ER -