TY - GEN
T1 - A 220nW neural amplifier for multi-channel neural recording systems
AU - Kim, Jungsuk
AU - Moo, Sung Chae
AU - Liu, Wentai
PY - 2009
Y1 - 2009
N2 - This paper presents a low-power neural amplifier for multi-channel neural recording systems. To achieve low power consumption and small die area, the single-branch amplifier, based on CMOS inverter, is employed along with a capacitive feedback loop. This amplifier has a gain of 28.9dB and operates from ±0.9V. The low-frequency cutoff is able to be varied from less than 100 Hz by adjusting the tuning voltage and the high-frequency cutoff is fixed at 11.2 KHz. The input-referred noise of this amplifier is 14.5μVrms and it consumes a power of 220nW. This low-power neural amplifier is fabricated in 0.35μm CMOS Process with active die areas of 200μx100μm.
AB - This paper presents a low-power neural amplifier for multi-channel neural recording systems. To achieve low power consumption and small die area, the single-branch amplifier, based on CMOS inverter, is employed along with a capacitive feedback loop. This amplifier has a gain of 28.9dB and operates from ±0.9V. The low-frequency cutoff is able to be varied from less than 100 Hz by adjusting the tuning voltage and the high-frequency cutoff is fixed at 11.2 KHz. The input-referred noise of this amplifier is 14.5μVrms and it consumes a power of 220nW. This low-power neural amplifier is fabricated in 0.35μm CMOS Process with active die areas of 200μx100μm.
UR - http://www.scopus.com/inward/record.url?scp=70350152844&partnerID=8YFLogxK
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U2 - 10.1109/ISCAS.2009.5117991
DO - 10.1109/ISCAS.2009.5117991
M3 - Conference contribution
AN - SCOPUS:70350152844
SN - 9781424438280
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1257
EP - 1260
BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Y2 - 24 May 2009 through 27 May 2009
ER -