A 24-GHz triple-mode programmable frequency divider in 0.13-μm CMOS technology

Y. S. Lin, C. L. Lu, Y. H. Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper proposes a new topology of a millimeter-wave triple-mode programmable frequency divider. An example of its application at the working frequency of 24 GHz is also demonstrated in TSMC 0.13-μm CMOS process. It consists of a mixer, a BPF, a CML divider and three pairs of switches. Under proper control of those switches, the proposed divider can offer three division mode of 1/2, 1/3 and 1/4. The divider core consumption is simulated to be 13.5 mW under a supply voltage of 1.2 V. In divide-by-two mode, the divider works from 15 to 26 GHz and the best input sensitivity is 0.1 Vp at 16 GHz. In divide-by-three mode, the divider still works from 15 to 26 GHz but the best input sensitivity slightly shifts to 0.13 Vp at 25 GHz. In divide-by-four mode, the divider is simulated to work from 19 to 24 GHz with a maximum input sensitivity of 0.32 Vp at 22 GHz.

Original languageEnglish
Title of host publicationAPMC 2009 - Asia Pacific Microwave Conference 2009
Pages381-384
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
EventAsia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore
Duration: 2009 Dec 72009 Dec 10

Publication series

NameAPMC 2009 - Asia Pacific Microwave Conference 2009

Other

OtherAsia Pacific Microwave Conference 2009, APMC 2009
CountrySingapore
CitySingapore
Period09-12-0709-12-10

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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