A 2.5 mW/ch, 50 Mcps, 10-Analog Channel, Adaptively Biased Read-Out Front-End IC with Low Intrinsic Timing Resolution for Single-Photon Time-of-Flight PET Applications with Time-Dependent Noise Analysis in 90 nm CMOS

Hugo Cruz, Hong Yi Huang, Ching Hsing Luo, Shuenn Yuh Lee

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

This paper presents a 10-channel time-of-flight application-specific integrated circuit (ASIC) for positron emission tomography in a 90 nm standard CMOS process. To overcome variations in channel-To-channel timing resolution caused by mismatch and process variations, adaptive biases and a digital-To-Analog converter (DAC) are utilized. The main contributions of this work are as follows. First, multistage architectures reduce the total power consumption, and detection bandwidths of analog preamplifiers and comparators are increased to 1 and 1.5 GHz, respectively, relative to those in previous studies. Second, a total intrinsic electronic timing resolution of 9.71 ps root-mean-square (RMS) is achieved (13.88 ps peak and 11.8 ps average of the 10 channels in 5 ASICs). Third, the proposed architecture reduces variations in channel-To-channel timing resolution to 2.6 bits (equivalent to 4.17 ps RMS) by calibrating analog comparator threshold levels. A 181.5 ps full-width-At-half-maximum timing resolution is measured with an avalanche photo diode and a laser setup. The power consumption is 2.5 mW using 0.5 and 1.2 V power supplies. The proposed ASIC is implemented in a 90 nm TSMC CMOS process with a total area of 3.3 mm × 2.7 mm.

Original languageEnglish
Article number7852499
Pages (from-to)287-299
Number of pages13
JournalIEEE Transactions on Biomedical Circuits and Systems
Volume11
Issue number2
DOIs
Publication statusPublished - 2017 Apr

All Science Journal Classification (ASJC) codes

  • Biomedical Engineering
  • Electrical and Electronic Engineering

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