A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window

Cheng Hsun Ho, Soon-Jyh Chang, Guan Ying Huang, Che Hsun Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes a 10-bit SAR ADC with time-based fixed window to reduce the unnecessary capacitor switchings, comparisons and digital control operations. It used only one comparator, and no need additional reference voltage to create the window. At 0.5-V supply and 100-kS/s, the ADC consumes only 252 nW and achieves an SNDR of 57.96 dB, resulting in a FOM of 3.9 fJ/conversion-step. The ADC core occupies an active area of only 178 × 184 μm 2 in 0.18-μm CMOS process.

Original languageEnglish
Title of host publication2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2345-2348
Number of pages4
ISBN (Print)9781479934324
DOIs
Publication statusPublished - 2014 Jan 1
Event2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia
Duration: 2014 Jun 12014 Jun 5

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
CountryAustralia
CityMelbourne, VIC
Period14-06-0114-06-05

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Capacitors
Electric potential

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Ho, C. H., Chang, S-J., Huang, G. Y., & Kuo, C. H. (2014). A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 (pp. 2345-2348). [6865642] (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2014.6865642
Ho, Cheng Hsun ; Chang, Soon-Jyh ; Huang, Guan Ying ; Kuo, Che Hsun. / A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 2345-2348 (Proceedings - IEEE International Symposium on Circuits and Systems).
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abstract = "This paper proposes a 10-bit SAR ADC with time-based fixed window to reduce the unnecessary capacitor switchings, comparisons and digital control operations. It used only one comparator, and no need additional reference voltage to create the window. At 0.5-V supply and 100-kS/s, the ADC consumes only 252 nW and achieves an SNDR of 57.96 dB, resulting in a FOM of 3.9 fJ/conversion-step. The ADC core occupies an active area of only 178 × 184 μm 2 in 0.18-μm CMOS process.",
author = "Ho, {Cheng Hsun} and Soon-Jyh Chang and Huang, {Guan Ying} and Kuo, {Che Hsun}",
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Ho, CH, Chang, S-J, Huang, GY & Kuo, CH 2014, A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. in 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014., 6865642, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., pp. 2345-2348, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, Melbourne, VIC, Australia, 14-06-01. https://doi.org/10.1109/ISCAS.2014.6865642

A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. / Ho, Cheng Hsun; Chang, Soon-Jyh; Huang, Guan Ying; Kuo, Che Hsun.

2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 2345-2348 6865642 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Ho CH, Chang S-J, Huang GY, Kuo CH. A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 2345-2348. 6865642. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2014.6865642