A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS

Hsin Chih Kuo, Huey Ru Chuang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

This paper presents a 60-GHz high-gain, low-power, 3.7-dB noise-figure (NF), CMOS low-noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two-stage cascode structure with a common-source buffer amplifier. To achieve a lower NF and to prevent poor linearity, an inter-stage noise matching inductor and a derivative superposition method were applied to the LNA design. A thin-film microstrip (TFMS) line was used for matching networks and all interconnections. The TFMS line consists of a top metal layer (M9) serving as the signal microstrip line and a bottom metal layer (M1) serving as the ground plane. The measurement results showed that the proposed LNA exhibited the best gain performance of 22 dB at 57.3 GHz and a minimum NF of 3.7 dB at 61 GHz. The input third-order intercept point was -13 dBm. Further, the proposed LNA dissipated a total power of 13.5 mW from a 1.5 V power supply.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013
Subtitle of host publication8th European Microwave Integrated Circuits Conference
Pages584-587
Number of pages4
Publication statusPublished - 2013 Dec 1
Event2013 8th European Microwave Integrated Circuits Conference, EuMIC 2013 - Held as Part of 16th European Microwave Week, EuMW 2013 - Nuremberg, Germany
Duration: 2013 Oct 62013 Oct 8

Publication series

NameEuropean Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference

Other

Other2013 8th European Microwave Integrated Circuits Conference, EuMIC 2013 - Held as Part of 16th European Microwave Week, EuMW 2013
CountryGermany
CityNuremberg
Period13-10-0613-10-08

Fingerprint

Low noise amplifiers
Noise figure
Microstrip lines
Buffer amplifiers
Thin films
Metals
Derivatives

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Kuo, H. C., & Chuang, H. R. (2013). A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS. In European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference (pp. 584-587). [6687916] (European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference).
Kuo, Hsin Chih ; Chuang, Huey Ru. / A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS. European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference. 2013. pp. 584-587 (European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference).
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title = "A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS",
abstract = "This paper presents a 60-GHz high-gain, low-power, 3.7-dB noise-figure (NF), CMOS low-noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two-stage cascode structure with a common-source buffer amplifier. To achieve a lower NF and to prevent poor linearity, an inter-stage noise matching inductor and a derivative superposition method were applied to the LNA design. A thin-film microstrip (TFMS) line was used for matching networks and all interconnections. The TFMS line consists of a top metal layer (M9) serving as the signal microstrip line and a bottom metal layer (M1) serving as the ground plane. The measurement results showed that the proposed LNA exhibited the best gain performance of 22 dB at 57.3 GHz and a minimum NF of 3.7 dB at 61 GHz. The input third-order intercept point was -13 dBm. Further, the proposed LNA dissipated a total power of 13.5 mW from a 1.5 V power supply.",
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Kuo, HC & Chuang, HR 2013, A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS. in European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference., 6687916, European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference, pp. 584-587, 2013 8th European Microwave Integrated Circuits Conference, EuMIC 2013 - Held as Part of 16th European Microwave Week, EuMW 2013, Nuremberg, Germany, 13-10-06.

A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS. / Kuo, Hsin Chih; Chuang, Huey Ru.

European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference. 2013. p. 584-587 6687916 (European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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N2 - This paper presents a 60-GHz high-gain, low-power, 3.7-dB noise-figure (NF), CMOS low-noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two-stage cascode structure with a common-source buffer amplifier. To achieve a lower NF and to prevent poor linearity, an inter-stage noise matching inductor and a derivative superposition method were applied to the LNA design. A thin-film microstrip (TFMS) line was used for matching networks and all interconnections. The TFMS line consists of a top metal layer (M9) serving as the signal microstrip line and a bottom metal layer (M1) serving as the ground plane. The measurement results showed that the proposed LNA exhibited the best gain performance of 22 dB at 57.3 GHz and a minimum NF of 3.7 dB at 61 GHz. The input third-order intercept point was -13 dBm. Further, the proposed LNA dissipated a total power of 13.5 mW from a 1.5 V power supply.

AB - This paper presents a 60-GHz high-gain, low-power, 3.7-dB noise-figure (NF), CMOS low-noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two-stage cascode structure with a common-source buffer amplifier. To achieve a lower NF and to prevent poor linearity, an inter-stage noise matching inductor and a derivative superposition method were applied to the LNA design. A thin-film microstrip (TFMS) line was used for matching networks and all interconnections. The TFMS line consists of a top metal layer (M9) serving as the signal microstrip line and a bottom metal layer (M1) serving as the ground plane. The measurement results showed that the proposed LNA exhibited the best gain performance of 22 dB at 57.3 GHz and a minimum NF of 3.7 dB at 61 GHz. The input third-order intercept point was -13 dBm. Further, the proposed LNA dissipated a total power of 13.5 mW from a 1.5 V power supply.

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Kuo HC, Chuang HR. A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS. In European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference. 2013. p. 584-587. 6687916. (European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference).