A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS

Hsin Chih Kuo, Huey Ru Chuang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

Abstract

This paper presents a 60-GHz high-gain, low-power, 3.7-dB noise-figure (NF), CMOS low-noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two-stage cascode structure with a common-source buffer amplifier. To achieve a lower NF and to prevent poor linearity, an inter-stage noise matching inductor and a derivative superposition method were applied to the LNA design. A thin-film microstrip (TFMS) line was used for matching networks and all interconnections. The TFMS line consists of a top metal layer (M9) serving as the signal microstrip line and a bottom metal layer (M1) serving as the ground plane. The measurement results showed that the proposed LNA exhibited the best gain performance of 22 dB at 57.3 GHz and a minimum NF of 3.7 dB at 61 GHz. The input third-order intercept point was -13 dBm. Further, the proposed LNA dissipated a total power of 13.5 mW from a 1.5 V power supply.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMC 2013
Subtitle of host publication43rd European Microwave Conference
Pages1555-1558
Number of pages4
Publication statusPublished - 2013 Dec 1
Event2013 43rd European Microwave Conference, EuMC 2013 - Held as Part of the 16th European Microwave Week, EuMW 2013 - Nuremberg, Germany
Duration: 2013 Oct 72013 Oct 10

Publication series

NameEuropean Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMC 2013: 43rd European Microwave Conference

Other

Other2013 43rd European Microwave Conference, EuMC 2013 - Held as Part of the 16th European Microwave Week, EuMW 2013
Country/TerritoryGermany
CityNuremberg
Period13-10-0713-10-10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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