A built-in current sensor based on current-mode design

Kuen Jong Lee; Jing Jou Tang

doi:10.1109/82.659464

A built-in current sensor based on current-mode design

Kuen Jong Lee, Jing Jou Tang

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

11 Citations (Scopus)

Abstract

A very simple yet powerful design of a built-in current sensor for CMOS IDDQ testing is presented. Compared with previous methods, this design has lower sensitivity to parameter deviation caused by process or temperature variations. In addition, this design provides scalable sensing resolutions and programmable current reference. Experimental results show that a test response time of less than 2 ns can be acquired when the faulty IDDQ current is higher than 250 //A.

Original language	English
Pages (from-to)	133-137
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Volume	45
Issue number	1
DOIs	https://doi.org/10.1109/82.659464
Publication status	Published - 1998

All Science Journal Classification (ASJC) codes

Signal Processing
Electrical and Electronic Engineering

Access to Document

10.1109/82.659464

Cite this

@article{0df8ea46dc864f62b5f5dce2c4810528,

title = "A built-in current sensor based on current-mode design",

abstract = "A very simple yet powerful design of a built-in current sensor for CMOS IDDQ testing is presented. Compared with previous methods, this design has lower sensitivity to parameter deviation caused by process or temperature variations. In addition, this design provides scalable sensing resolutions and programmable current reference. Experimental results show that a test response time of less than 2 ns can be acquired when the faulty IDDQ current is higher than 250 //A.",

author = "Lee, {Kuen Jong} and Tang, {Jing Jou}",

note = "Funding Information: Manuscript received January 4, 1996; revised December 19, 1996. This work was supported by the National Science Council R.O.C. under Contract NSC-83–0404–E-006–036. This paper recommended by Associate Editor G. W. Roberts. K.-J. Lee is with the Department of Electrical Engineering, National Cheng-Kung University, Tainan, Taiwan 70101, R.O.C. J.-J. Tang is with the Department of Electronic Engineering, Nan-Tai Institute of Technology, Tainan, Taiwan 71000, R.O.C. Publisher Item Identifier S 1057-7130(98)00056-1.",

year = "1998",

doi = "10.1109/82.659464",

language = "English",

volume = "45",

pages = "133--137",

journal = "IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing",

issn = "1057-7130",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

}

TY - JOUR

T1 - A built-in current sensor based on current-mode design

AU - Lee, Kuen Jong

AU - Tang, Jing Jou

N1 - Funding Information: Manuscript received January 4, 1996; revised December 19, 1996. This work was supported by the National Science Council R.O.C. under Contract NSC-83–0404–E-006–036. This paper recommended by Associate Editor G. W. Roberts. K.-J. Lee is with the Department of Electrical Engineering, National Cheng-Kung University, Tainan, Taiwan 70101, R.O.C. J.-J. Tang is with the Department of Electronic Engineering, Nan-Tai Institute of Technology, Tainan, Taiwan 71000, R.O.C. Publisher Item Identifier S 1057-7130(98)00056-1.

PY - 1998

Y1 - 1998

N2 - A very simple yet powerful design of a built-in current sensor for CMOS IDDQ testing is presented. Compared with previous methods, this design has lower sensitivity to parameter deviation caused by process or temperature variations. In addition, this design provides scalable sensing resolutions and programmable current reference. Experimental results show that a test response time of less than 2 ns can be acquired when the faulty IDDQ current is higher than 250 //A.

AB - A very simple yet powerful design of a built-in current sensor for CMOS IDDQ testing is presented. Compared with previous methods, this design has lower sensitivity to parameter deviation caused by process or temperature variations. In addition, this design provides scalable sensing resolutions and programmable current reference. Experimental results show that a test response time of less than 2 ns can be acquired when the faulty IDDQ current is higher than 250 //A.

UR - http://www.scopus.com/inward/record.url?scp=0031648758&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0031648758&partnerID=8YFLogxK

U2 - 10.1109/82.659464

DO - 10.1109/82.659464

M3 - Article

AN - SCOPUS:0031648758

SN - 1057-7130

VL - 45

SP - 133

EP - 137

JO - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

JF - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

IS - 1

ER -

A built-in current sensor based on current-mode design

Abstract

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this