A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme

Tsung Chih Hung; Jia Ching Wang; Tai Haur Kuo

doi:10.1109/ISSCC19947.2020.9063055

A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme

Tsung Chih Hung, Jia Ching Wang, Tai Haur Kuo

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

13 Citations (Scopus)

Abstract

With the increasing demand for next-generation communication, the trend of developing wide-bandwidth, high-resolution ADCs has emerged, where pipelined SAR (PIPE-SAR) ADCs [1], [2] have become popular owing to their excellent power-efficiency due to the fewer number of opamps. However, the finite opamp gain error limits the resolution of PIPE-SAR ADCs. Without calibration, this work proposes the weighted-averaging correlated level shifting (WACLS) technique for PIPE-SAR ADCs to theoretically eliminate the finite opamp gain error and operate with a speed-enhancement scheme to overcome the speed-degradation drawback of the prior two-phase CLS-based residue amplification [3], [4]. In addition, a duty-cycle-controlled ring amplifier (ringamp) with quick start-up is proposed for power saving.

Original language	English
Title of host publication	2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	256-258
Number of pages	3
ISBN (Electronic)	9781728132044
DOIs	https://doi.org/10.1109/ISSCC19947.2020.9063055
Publication status	Published - 2020 Feb
Event	2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States Duration: 2020 Feb 16 → 2020 Feb 20

Publication series

Name	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	2020-February
ISSN (Print)	0193-6530

Conference

Conference	2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
Country/Territory	United States
City	San Francisco
Period	20-02-16 → 20-02-20

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/ISSCC19947.2020.9063055

Cite this

Hung, T. C., Wang, J. C., & Kuo, T. H. (2020). A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme. In 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 (pp. 256-258). [9063055] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2020-February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC19947.2020.9063055

Hung, Tsung Chih ; Wang, Jia Ching ; Kuo, Tai Haur. / A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme. 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 256-258 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

@inproceedings{e005c5d91afb4807a865a1dc7a424b91,

title = "A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme",

abstract = "With the increasing demand for next-generation communication, the trend of developing wide-bandwidth, high-resolution ADCs has emerged, where pipelined SAR (PIPE-SAR) ADCs [1], [2] have become popular owing to their excellent power-efficiency due to the fewer number of opamps. However, the finite opamp gain error limits the resolution of PIPE-SAR ADCs. Without calibration, this work proposes the weighted-averaging correlated level shifting (WACLS) technique for PIPE-SAR ADCs to theoretically eliminate the finite opamp gain error and operate with a speed-enhancement scheme to overcome the speed-degradation drawback of the prior two-phase CLS-based residue amplification [3], [4]. In addition, a duty-cycle-controlled ring amplifier (ringamp) with quick start-up is proposed for power saving.",

author = "Hung, {Tsung Chih} and Wang, {Jia Ching} and Kuo, {Tai Haur}",

year = "2020",

month = feb,

doi = "10.1109/ISSCC19947.2020.9063055",

language = "English",

series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "256--258",

booktitle = "2020 IEEE International Solid-State Circuits Conference, ISSCC 2020",

address = "United States",

note = "2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 ; Conference date: 16-02-2020 Through 20-02-2020",

}

Hung, TC, Wang, JC & Kuo, TH 2020, A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme. in 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020., 9063055, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, vol. 2020-February, Institute of Electrical and Electronics Engineers Inc., pp. 256-258, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, San Francisco, United States, 20-02-16. https://doi.org/10.1109/ISSCC19947.2020.9063055

A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme. / Hung, Tsung Chih; Wang, Jia Ching; Kuo, Tai Haur.

2020 IEEE International Solid-State Circuits Conference, ISSCC 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 256-258 9063055 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2020-February).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme

AU - Hung, Tsung Chih

AU - Wang, Jia Ching

AU - Kuo, Tai Haur

PY - 2020/2

Y1 - 2020/2

N2 - With the increasing demand for next-generation communication, the trend of developing wide-bandwidth, high-resolution ADCs has emerged, where pipelined SAR (PIPE-SAR) ADCs [1], [2] have become popular owing to their excellent power-efficiency due to the fewer number of opamps. However, the finite opamp gain error limits the resolution of PIPE-SAR ADCs. Without calibration, this work proposes the weighted-averaging correlated level shifting (WACLS) technique for PIPE-SAR ADCs to theoretically eliminate the finite opamp gain error and operate with a speed-enhancement scheme to overcome the speed-degradation drawback of the prior two-phase CLS-based residue amplification [3], [4]. In addition, a duty-cycle-controlled ring amplifier (ringamp) with quick start-up is proposed for power saving.

AB - With the increasing demand for next-generation communication, the trend of developing wide-bandwidth, high-resolution ADCs has emerged, where pipelined SAR (PIPE-SAR) ADCs [1], [2] have become popular owing to their excellent power-efficiency due to the fewer number of opamps. However, the finite opamp gain error limits the resolution of PIPE-SAR ADCs. Without calibration, this work proposes the weighted-averaging correlated level shifting (WACLS) technique for PIPE-SAR ADCs to theoretically eliminate the finite opamp gain error and operate with a speed-enhancement scheme to overcome the speed-degradation drawback of the prior two-phase CLS-based residue amplification [3], [4]. In addition, a duty-cycle-controlled ring amplifier (ringamp) with quick start-up is proposed for power saving.

UR - http://www.scopus.com/inward/record.url?scp=85083844984&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85083844984&partnerID=8YFLogxK

U2 - 10.1109/ISSCC19947.2020.9063055

DO - 10.1109/ISSCC19947.2020.9063055

M3 - Conference contribution

AN - SCOPUS:85083844984

T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

SP - 256

EP - 258

BT - 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020

Y2 - 16 February 2020 through 20 February 2020

ER -

Hung TC, Wang JC, Kuo TH. A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme. In 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020. Institute of Electrical and Electronics Engineers Inc. 2020. p. 256-258. 9063055. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC19947.2020.9063055

A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme

Abstract

Publication series

Conference

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this