A capacitor-less fast-transient low-dropout regulator with mismatch comparator control for portable electronic products

Chien-Hung Tsai, Jia Hui Wang

Research output: Contribution to journalArticle

Abstract

The design of a capacitor-less and fast transient low-dropout (LDO) regulator with mismatch comparator control (MCC) for portable electronic products is presented. The proposed LDO regulator combines a push-pull buffer and a mismatch comparator. The push-pull buffer maintains the output voltage of the LDO regulator under static and transient states. The mismatch comparator senses the variation of output voltage of the LDO regulator and turns the auxiliary transistor of the output stage on or off to adjust the slew rate at the gate of the power transistor in the transient state. The auxiliary transistors work in the cut-off region to reduce power consumption in the static state. A lV-output capacitor-less LDO regulator was fabricated in 0.35um CMOS technology with a power supply of 1.2 V. The regulator consumes only 30μA of quiescent current. The variation of the output voltage of the LDO regulator is 47mV, whereas that for a regulator without MCC is more than 950mV, under load current that changes from 0 to 100 mA with a rise time of 100 ns.

Original languageEnglish
Pages (from-to)35-42
Number of pages8
JournalInternational Journal of Electrical Engineering
Volume18
Issue number1
Publication statusPublished - 2011 Feb

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Capacitors
Transistors
Electric potential
Electric power utilization

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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abstract = "The design of a capacitor-less and fast transient low-dropout (LDO) regulator with mismatch comparator control (MCC) for portable electronic products is presented. The proposed LDO regulator combines a push-pull buffer and a mismatch comparator. The push-pull buffer maintains the output voltage of the LDO regulator under static and transient states. The mismatch comparator senses the variation of output voltage of the LDO regulator and turns the auxiliary transistor of the output stage on or off to adjust the slew rate at the gate of the power transistor in the transient state. The auxiliary transistors work in the cut-off region to reduce power consumption in the static state. A lV-output capacitor-less LDO regulator was fabricated in 0.35um CMOS technology with a power supply of 1.2 V. The regulator consumes only 30μA of quiescent current. The variation of the output voltage of the LDO regulator is 47mV, whereas that for a regulator without MCC is more than 950mV, under load current that changes from 0 to 100 mA with a rise time of 100 ns.",
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