A CMOS analog vector quantizer for pattern recognition

Yu Cherng Hung, Bin Da Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A linear mean-absolute-difference (MAD) cell is designed. Based on this cell and winner-take-all circuit, we propose a parallel analog vector-quantizer for pattern recognition. The experimental circuit is constituted by one input pattern and 16 template patterns with 16 elements. This circuit had been simulated using 0.5 μm CMOS technology by HSPICE. The results show that a pattern can be correctly identified if the difference of the MAD distance metric is larger or smaller than 100 mV. Simulation results demonstrate 250 ns identified time and 16 mW power dissipation for single 3.3 V voltage supply.

Original languageEnglish
Title of host publicationAP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages112-115
Number of pages4
ISBN (Print)0780357051, 9780780357051
DOIs
Publication statusPublished - 1999 Jan 1
Event1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999 - Seoul, Korea, Republic of
Duration: 1999 Aug 231999 Aug 25

Publication series

NameAP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Other

Other1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999
Country/TerritoryKorea, Republic of
CitySeoul
Period99-08-2399-08-25

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Electronic, Optical and Magnetic Materials

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