A compact SPICE model for bipolar resistive switching memory

Kai Hsiang Hsu, Wei Wen Ding, Meng Hsueh Chiang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In this paper, we successfully develop a compact model for bipolar resistive switching memory using Verilog-A. Fundamental I-V characteristics of RRAM are physically and yet simply represented by this model. Since the Verilog-A modeling is flexible and portable for many circuit simulators, the proposed modeling technique can be widely used.

Original languageEnglish
Title of host publication2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013
DOIs
Publication statusPublished - 2013 Dec 23
Event2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013 - Hong Kong, Hong Kong
Duration: 2013 Jun 32013 Jun 5

Publication series

Name2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013

Other

Other2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013
CountryHong Kong
CityHong Kong
Period13-06-0313-06-05

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Hsu, K. H., Ding, W. W., & Chiang, M. H. (2013). A compact SPICE model for bipolar resistive switching memory. In 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013 [6628127] (2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013). https://doi.org/10.1109/EDSSC.2013.6628127