A comparative study of fin-last and fin-first SOI FinFETs

Darsen Lu, Josephine Chang, Michael A. Guillorn, Chung Hsun Lin, Jeffrey Johnson, Philip Oldiges, Ken Rim, Mukesh Khare, Wilfried Haensch

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Two FinFET fabrication processes are compared with simulation: the conventional fin-first process and the novel fin-last process. With the fin-last process, more longitudinal strain can be incorporated into the channel from source and drain SiGe stressor than fin-first. pFET mobility advantage is 15% at fully-strained condition and with silicon recess. Maintaining vertical junction uniformity is the main challenge for fin-last. However, its impact on parasitic resistance and capacitances are small. Vertical junction non-uniformity is improved with source and drain recess and doping optimization.

Original languageEnglish
Title of host publication2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013
Pages147-150
Number of pages4
DOIs
Publication statusPublished - 2013
Event18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 - Glasgow, United Kingdom
Duration: 2013 Sep 32013 Sep 5

Publication series

NameInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Other

Other18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013
CountryUnited Kingdom
CityGlasgow
Period13-09-0313-09-05

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Modelling and Simulation

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  • Cite this

    Lu, D., Chang, J., Guillorn, M. A., Lin, C. H., Johnson, J., Oldiges, P., Rim, K., Khare, M., & Haensch, W. (2013). A comparative study of fin-last and fin-first SOI FinFETs. In 2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 (pp. 147-150). [6650596] (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). https://doi.org/10.1109/SISPAD.2013.6650596