A digital peak current delay compensation for primary-side regulation flyback adapter

Chun Ping Niou; Chien Hung Tsai; Ta Jin Chen

doi:10.1109/VLSI-DAT.2018.8373260

A digital peak current delay compensation for primary-side regulation flyback adapter

Chun Ping Niou, Chien Hung Tsai, Ta Jin Chen

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Citations (Scopus)

Abstract

A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.

Original language	English
Title of host publication	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-4
Number of pages	4
ISBN (Electronic)	9781538642603
DOIs	https://doi.org/10.1109/VLSI-DAT.2018.8373260
Publication status	Published - 2018 Jun 5
Event	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 - Hsinchu, Taiwan Duration: 2018 Apr 16 → 2018 Apr 19

Publication series

Name	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018

Other

Other	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
Country/Territory	Taiwan
City	Hsinchu
Period	18-04-16 → 18-04-19

All Science Journal Classification (ASJC) codes

Safety, Risk, Reliability and Quality
Control and Optimization
Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/VLSI-DAT.2018.8373260

Cite this

Niou, C. P., Tsai, C. H., & Chen, T. J. (2018). A digital peak current delay compensation for primary-side regulation flyback adapter. In 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 (pp. 1-4). (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2018.8373260

Niou, Chun Ping ; Tsai, Chien Hung ; Chen, Ta Jin. / A digital peak current delay compensation for primary-side regulation flyback adapter. 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1-4 (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018).

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title = "A digital peak current delay compensation for primary-side regulation flyback adapter",

abstract = "A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.",

author = "Niou, {Chun Ping} and Tsai, {Chien Hung} and Chen, {Ta Jin}",

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Niou, CP, Tsai, CH & Chen, TJ 2018, A digital peak current delay compensation for primary-side regulation flyback adapter. in 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018, Institute of Electrical and Electronics Engineers Inc., pp. 1-4, 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018, Hsinchu, Taiwan, 18-04-16. https://doi.org/10.1109/VLSI-DAT.2018.8373260

A digital peak current delay compensation for primary-side regulation flyback adapter. / Niou, Chun Ping; Tsai, Chien Hung; Chen, Ta Jin.
2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-4 (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.

AB - A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.

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Niou CP, Tsai CH, Chen TJ. A digital peak current delay compensation for primary-side regulation flyback adapter. In 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1-4. (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018). doi: 10.1109/VLSI-DAT.2018.8373260

A digital peak current delay compensation for primary-side regulation flyback adapter

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