A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process

Ying Zu Lin, Yen Ting Liu, Soon-Jyh Chang

Research output: Contribution to conference › Paper

1 Citation (Scopus)

Abstract

A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm2 active area and consumes 5.06 mW from a 1.2-V supply.

Original languageEnglish
Pages159-162
Number of pages4
DOIs
Publication statusPublished - 2006 Dec 1
Event2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China
Duration: 2006 Nov 13 → 2006 Nov 15

Other

Other2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
CountryChina
CityHangzhou
Period06-11-13 → 06-11-15

Fingerprint

Feedback
Operational amplifiers
Electric potential
Resistors
Calibration
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Lin, Y. Z., Liu, Y. T., & Chang, S-J. (2006). A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process. 159-162. Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China. https://doi.org/10.1109/ASSCC.2006.357875
Lin, Ying Zu ; Liu, Yen Ting ; Chang, Soon-Jyh. / A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process. Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China.4 p.
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Lin, YZ, Liu, YT & Chang, S-J 2006, 'A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process' Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China, 06-11-13 - 06-11-15, pp. 159-162. https://doi.org/10.1109/ASSCC.2006.357875

A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process. / Lin, Ying Zu; Liu, Yen Ting; Chang, Soon-Jyh.

2006. 159-162 Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China.

Research output: Contribution to conference › Paper

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AB - A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm2 active area and consumes 5.06 mW from a 1.2-V supply.

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Lin YZ, Liu YT, Chang S-J. A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process. 2006. Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China. https://doi.org/10.1109/ASSCC.2006.357875

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