A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process

Ying Zu Lin; Yen Ting Liu; Soon-Jyh Chang

doi:10.1109/ASSCC.2006.357875

A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process

Ying Zu Lin, Yen Ting Liu, Soon-Jyh Chang

Department of Electrical Engineering

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm² active area and consumes 5.06 mW from a 1.2-V supply.

Original language	English
Pages	159-162
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2006.357875
Publication status	Published - 2006 Dec 1
Event	2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China Duration: 2006 Nov 13 → 2006 Nov 15

Other

Other	2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
Country/Territory	China
City	Hangzhou
Period	06-11-13 → 06-11-15

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

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10.1109/ASSCC.2006.357875

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title = "A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process",

abstract = "A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm2 active area and consumes 5.06 mW from a 1.2-V supply.",

author = "Lin, {Ying Zu} and Liu, {Yen Ting} and Soon-Jyh Chang",

year = "2006",

month = dec,

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doi = "10.1109/ASSCC.2006.357875",

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AU - Lin, Ying Zu

AU - Liu, Yen Ting

AU - Chang, Soon-Jyh

PY - 2006/12/1

Y1 - 2006/12/1

N2 - A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm2 active area and consumes 5.06 mW from a 1.2-V supply.

AB - A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm2 active area and consumes 5.06 mW from a 1.2-V supply.

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T2 - 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006

Y2 - 13 November 2006 through 15 November 2006

ER -

A digitally calibrated current-voltage feedback transconductor in 0.13-μm CMOS process

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