TY - JOUR
T1 - A Distortion Cancelation Technique with the Recursive DFT Method for Successive Approximation Analog-To-Digital Converters
AU - Juan, Yi Hsiang
AU - Huang, Hong Yi
AU - Lai, Shin Chi
AU - Juang, Wen Ho
AU - Lee, Shuenn Yuh
AU - Luo, Ching Hsing
PY - 2016/2
Y1 - 2016/2
N2 - This paper proposes a recursive discrete Fourier transform (RDFT) foreground digital calibration method for successive approximation (SAR) analog-To-digital converters (ADCs). This calibration method can lower the harmonic distortion caused by capacitor mismatch and dc offset of comparators to improve the resolution and performance of ADCs. Capacitor mismatch results in a digital-To-Analog converter (DAC) capacitor array that is unequal to 2n. RDFT can be adopted to evaluate the real radixes of a DAC capacitor array with a new digital output to compensate for the error caused by capacitor mismatch. Furthermore, the calibration technique can eliminate the dc offset error of a comparator circuit. The proposed novel digital calibration method that utilizes RDFT instead of the traditional fast Fourier transform has the advantages of variable transform length, lower complexity, faster computation, and less hardware cost. The analog block of SAR ADC with RDFT is implemented in the TSMC 0.18-μm standard CMOS process with a 200-kS/s sampling rate to validate the proposed method. Simulation results show that the total harmonic distortion (THD) is 64.97 dB before calibration, whereas a THD of 73.05 dB can be achieved after calibration. In addition, the effective bit numbers are 9.98 and 11.26 b before and after calibration, respectively.
AB - This paper proposes a recursive discrete Fourier transform (RDFT) foreground digital calibration method for successive approximation (SAR) analog-To-digital converters (ADCs). This calibration method can lower the harmonic distortion caused by capacitor mismatch and dc offset of comparators to improve the resolution and performance of ADCs. Capacitor mismatch results in a digital-To-Analog converter (DAC) capacitor array that is unequal to 2n. RDFT can be adopted to evaluate the real radixes of a DAC capacitor array with a new digital output to compensate for the error caused by capacitor mismatch. Furthermore, the calibration technique can eliminate the dc offset error of a comparator circuit. The proposed novel digital calibration method that utilizes RDFT instead of the traditional fast Fourier transform has the advantages of variable transform length, lower complexity, faster computation, and less hardware cost. The analog block of SAR ADC with RDFT is implemented in the TSMC 0.18-μm standard CMOS process with a 200-kS/s sampling rate to validate the proposed method. Simulation results show that the total harmonic distortion (THD) is 64.97 dB before calibration, whereas a THD of 73.05 dB can be achieved after calibration. In addition, the effective bit numbers are 9.98 and 11.26 b before and after calibration, respectively.
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U2 - 10.1109/TCSII.2015.2468918
DO - 10.1109/TCSII.2015.2468918
M3 - Article
AN - SCOPUS:84962304949
VL - 63
SP - 146
EP - 150
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
SN - 1549-7747
IS - 2
M1 - 7202812
ER -