A divide-by-four transformer-coupled regenerative frequency divider with quadrature outputs

Yu Sheng Lin, Cheng Han Wu, Chun Lin Lu, Yeong Her Wang

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)

Abstract

A divide-by-four transformer-coupled regenerative frequency divider implemented by a TSMC 90 nm CMOS process is presented. A transformer-coupling technique and a source-injected current-mode-logic divider were proposed to increase the injection signal level and widen the operation range of the loop divider. A subharmonic mixer with bottom-switching pairs was used to reduce dc power consumption and optimize the conversion gain. The divider core consumes 6.8 mW at 1.2 V supply voltage. Without using the tuning techniques, the measured locking range is 4.7 GHz (20.9%) from 20.1 to 24.8 GHz. The phase deviation of the quadrature output is less than 0.77̂.

Original languageEnglish
Article number6712920
Pages (from-to)260-262
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume24
Issue number4
DOIs
Publication statusPublished - 2014 Apr

All Science Journal Classification (ASJC) codes

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'A divide-by-four transformer-coupled regenerative frequency divider with quadrature outputs'. Together they form a unique fingerprint.

Cite this