A DSP/FPGA design for the acquisition and tracking of GIOVE-A signals

Modernized GPS and Galileo will adopt variations of the Binary Offset Carrier (BOC) modulation to achieve improved tracking properties and spectrum separation. The BOC modulation typically modulates the carrier signal with a sine or cosine phased square subcarrier in addition to a spreading code. The modulated signals yield improved noise performance and multipath mitigation. However, owing to the multiple peaks in the resulting autocorrelation function, this modulation may potentially lead to difficulties in signal acquisition and tracking. A Global Navigation Satellite System (GNSS) receiver employs a code tracking loop for keeping track of the code phase of a specific code. To prevent the tracking ambiguity, some modifications to traditional code tracking loops are needed. Typically, the code tracking loop in the GNSS receiver is delay lock loops (DLLs). In general, DLLs is accomplished by the early-minus-late type discriminator. However, the type of the discriminator has a challenge in tracking the main peak. Besides the deficiency, there are other factors to influence on estimate the code delay tracking such as the bias, sensitivity, operating range, and variance of the discriminator output. In order to improve the tracking performance, a multiobjective approach has been proposed to design a multicorrelator based discriminator. The focus of this paper is to realize the multi-correlator structure using a DSP/FPGA board. At the beginning, the multi-objective approach is tested by the simulated signal. Then, the Galileo (GIOVE-A) signal will be received and processed by the DSP/FPGA board to verification the multi-objective approach.